TBR: i#1795 drreg: 1-step slowpath transition with separated TLS slots

Commit log for first patchset:
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i#1795 drreg: 1-step slowpath transition with separated TLS slots

Switches the TLS slots used to send parameters through the shared_slowpath
gencode to the slowpath C code to be separate from the scratch register TLS
slots.  This will make it much easier to use drreg and to move toward
local, asynchronous scratch register usage.

Switches from a 2-step transition out of the slowpath that relies on the
low-performance OP_xchg instruction to a 1-step transition, made possible
by no longer clobbering the scratch TLS slots.

Updates DR to abcd9b0 for the i#2136 cpuid fix, which is exposed by this
change as ecx is not (overly) restored by the 1-step transition like it was
for the 2-step.
---------------

[bruening, 2017-01-13 05:23:55]

Committed as
https://github.com/DynamoRIO/drmemory/commit/33e1c26b5b4866f6ec56c34e0b3a84f6...

Final commit log: 
---------------
i#1795 drreg: 1-step slowpath transition with separated TLS slots

Switches the TLS slots used to send parameters through the shared_slowpath
gencode to the slowpath C code to be separate from the scratch register TLS
slots.  This will make it much easier to use drreg and to move toward
local, asynchronous scratch register usage.

Switches from a 2-step transition out of the slowpath that relies on the
low-performance OP_xchg instruction to a 1-step transition, made possible
by no longer clobbering the scratch TLS slots.

Updates DR to abcd9b0 for the i#2136 cpuid fix, which is exposed by this
change as ecx is not (overly) restored by the 1-step transition like it was
for the 2-step.

Review-URL: https://codereview.appspot.com/314250043
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