code review 5279048: runtime: faster and more scalable GC

src/pkg/runtime/asm_386.s

 // Copyright 2009 The Go Authors. All rights reserved.
 // Use of this source code is governed by a BSD-style
 // license that can be found in the LICENSE file.
 
 #include "zasm_GOOS_GOARCH.h"
 
 TEXT _rt0_386(SB),7,$0
         // copy arguments forward on an even stack
         MOVL    0(SP), AX               // argc
         LEAL    4(SP), BX               // argv
@@ skipping 281 matching lines @@
         MOVL    8(SP), AX
         MOVL    12(SP), CX
         LOCK
         CMPXCHGL        CX, 0(BX)
         JZ 3(PC)
         MOVL    $0, AX
         RET
         MOVL    $1, AX
         RET
 
+// bool runtime·cas64(uint64 *val, uint64 *old, uint64 new)
+// Atomically:
+//      if(*val == *old){
+//              *val = new;
+//              return 1;
+//      } else {
+//              *old = *val
+//              return 0;
+//      }
+TEXT runtime·cas64(SB), 7, $0
+        MOVL    4(SP), BP
+        MOVL    8(SP), SI
+        MOVL    0(SI), AX
+        MOVL    4(SI), DX
+        MOVL    12(SP), BX
+        MOVL    16(SP), CX
+        LOCK
+        CMPXCHG8B       0(BP)
+        JNZ     cas64_fail
+        MOVL    $1, AX
+        RET
+cas64_fail:
+        MOVL    AX, 0(SI)
+        MOVL    DX, 4(SI)
+        XORL    AX, AX
+        RET
+
 // bool casp(void **p, void *old, void *new)
 // Atomically:
 //      if(*p == old){
 //              *p = new;
 //              return 1;
 //      }else
 //              return 0;
 TEXT runtime·casp(SB), 7, $0
         MOVL    4(SP), BX
         MOVL    8(SP), AX
@@ skipping 36 matching lines @@
 TEXT runtime·atomicstorep(SB), 7, $0
         MOVL    4(SP), BX
         MOVL    8(SP), AX
         XCHGL   AX, 0(BX)
         RET
 
 TEXT runtime·atomicstore(SB), 7, $0
         MOVL    4(SP), BX
         MOVL    8(SP), AX
         XCHGL   AX, 0(BX)
+        RET
+
+// uint64 atomicload64(uint64 volatile* addr);
+// so actually
+// void atomicload64(uint64 *res, uint64 volatile *addr);
+TEXT runtime·atomicload64(SB), 7, $0
+        MOVL    4(SP), BX
+        MOVL    8(SP), AX
+        // MOVQ (%EAX), %MM0
+        BYTE $0x0f; BYTE $0x6f; BYTE $0x00
+        // MOVQ %MM0, 0(%EBX)
+        BYTE $0x0f; BYTE $0x7f; BYTE $0x03
+        // EMMS
+        BYTE $0x0F; BYTE $0x77
+        RET
+
+// void runtime·atomicstore64(uint64 volatile* addr, uint64 v);
+TEXT runtime·atomicstore64(SB), 7, $0
+        MOVL    4(SP), AX
+        // MOVQ and EMMS were introduced on the Pentium MMX.
+        // MOVQ 0x8(%ESP), %MM0
+        BYTE $0x0f; BYTE $0x6f; BYTE $0x44; BYTE $0x24; BYTE $0x08
+        // MOVQ %MM0, (%EAX)
+        BYTE $0x0f; BYTE $0x7f; BYTE $0x00·
+        // EMMS
+        BYTE $0x0F; BYTE $0x77
+        // This is essentially a no-op, but it provides required memory fencing.
+        // It can be replaced with MFENCE, but MFENCE was introduced only on the Pentium4 (SSE2).
+        XORL    AX, AX
+        LOCK
+        XADDL   AX, (SP)
+        RET
+
+TEXT runtime·prefetch(SB), 7, $0
+        MOVL    4(SP), AX
+        // PREFETCHNTA (AX)
+        BYTE $0x0f; BYTE $0x18; BYTE $0x00
         RET
 
 // void jmpdefer(fn, sp);
 // called from deferreturn.
 // 1. pop the caller
 // 2. sub 5 bytes from the callers return
 // 3. jmp to the argument
 TEXT runtime·jmpdefer(SB), 7, $0
         MOVL    4(SP), AX       // fn
         MOVL    8(SP), BX       // caller sp
@@ skipping 195 matching lines @@
 TEXT runtime·stackguard(SB),7,$0
         MOVL    SP, DX
         MOVL    DX, sp+0(FP)
         get_tls(CX)
         MOVL    g(CX), BX
         MOVL    g_stackguard(BX), DX
         MOVL    DX, guard+4(FP)
         RET
 
 GLOBL runtime·tls0(SB), $32