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1 // Inferno utils/5c/peep.c | 1 // Inferno utils/5c/peep.c |
2 // http://code.google.com/p/inferno-os/source/browse/utils/5g/peep.c | 2 // http://code.google.com/p/inferno-os/source/browse/utils/5g/peep.c |
3 // | 3 // |
4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. | 4 // Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved. |
5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) | 5 // Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net) |
6 // Portions Copyright © 1997-1999 Vita Nuova Limited | 6 // Portions Copyright © 1997-1999 Vita Nuova Limited |
7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuov
a.com) | 7 // Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuov
a.com) |
8 // Portions Copyright © 2004,2006 Bruce Ellis | 8 // Portions Copyright © 2004,2006 Bruce Ellis |
9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) | 9 // Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net) |
10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others | 10 // Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others |
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332 for(r=uniqp(r0); r!=R; r=uniqp(r)) { | 332 for(r=uniqp(r0); r!=R; r=uniqp(r)) { |
333 if(uniqs(r) == R) | 333 if(uniqs(r) == R) |
334 break; | 334 break; |
335 p = r->prog; | 335 p = r->prog; |
336 switch(p->as) { | 336 switch(p->as) { |
337 case ABL: | 337 case ABL: |
338 return 0; | 338 return 0; |
339 | 339 |
340 case AMULLU: | 340 case AMULLU: |
341 case AMULA: | 341 case AMULA: |
342 //» » case AMVN: | 342 » » case AMVN: |
| 343 » » » return 0; |
343 | 344 |
344 case ACMN: | 345 case ACMN: |
345 case AADD: | 346 case AADD: |
346 case ASUB: | 347 case ASUB: |
347 case ASBC: | 348 case ASBC: |
348 case ARSB: | 349 case ARSB: |
349 case ASLL: | 350 case ASLL: |
350 case ASRL: | 351 case ASRL: |
351 case ASRA: | 352 case ASRA: |
352 case AORR: | 353 case AORR: |
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978 return 0; | 979 return 0; |
979 | 980 |
980 case ANOP: /* read,, write */ | 981 case ANOP: /* read,, write */ |
981 case AMOVW: | 982 case AMOVW: |
982 case AMOVF: | 983 case AMOVF: |
983 case AMOVD: | 984 case AMOVD: |
984 case AMOVH: | 985 case AMOVH: |
985 case AMOVHU: | 986 case AMOVHU: |
986 case AMOVB: | 987 case AMOVB: |
987 case AMOVBU: | 988 case AMOVBU: |
| 989 case AMOVFW: |
| 990 case AMOVWF: |
988 case AMOVDW: | 991 case AMOVDW: |
989 case AMOVWD: | 992 case AMOVWD: |
990 case AMOVFD: | 993 case AMOVFD: |
991 case AMOVDF: | 994 case AMOVDF: |
992 if(p->scond&(C_WBIT|C_PBIT)) | 995 if(p->scond&(C_WBIT|C_PBIT)) |
993 if(v->type == D_REG) { | 996 if(v->type == D_REG) { |
994 if(p->from.type == D_OREG || p->from.type == D_SHIFT) { | 997 if(p->from.type == D_OREG || p->from.type == D_SHIFT) { |
995 if(p->from.reg == v->reg) | 998 if(p->from.reg == v->reg) |
996 return 2; | 999 return 2; |
997 } else { | 1000 } else { |
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1013 return 3; | 1016 return 3; |
1014 } | 1017 } |
1015 if(copyau(&p->from, v)) | 1018 if(copyau(&p->from, v)) |
1016 return 1; | 1019 return 1; |
1017 if(copyau(&p->to, v)) | 1020 if(copyau(&p->to, v)) |
1018 return 1; | 1021 return 1; |
1019 return 0; | 1022 return 0; |
1020 | 1023 |
1021 case AMULLU: /* read, read, write, write */ | 1024 case AMULLU: /* read, read, write, write */ |
1022 case AMULA: | 1025 case AMULA: |
1023 //» case AMVN: | 1026 » case AMVN: |
1024 return 2; | 1027 return 2; |
1025 | 1028 |
1026 case AADD: /* read, read, write */ | 1029 case AADD: /* read, read, write */ |
1027 case AADC: | 1030 case AADC: |
1028 case ASUB: | 1031 case ASUB: |
1029 case ASBC: | 1032 case ASBC: |
1030 case ARSB: | 1033 case ARSB: |
1031 case ASLL: | 1034 case ASLL: |
1032 case ASRL: | 1035 case ASRL: |
1033 case ASRA: | 1036 case ASRA: |
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1185 * either direct or indirect | 1188 * either direct or indirect |
1186 */ | 1189 */ |
1187 int | 1190 int |
1188 copyau(Adr *a, Adr *v) | 1191 copyau(Adr *a, Adr *v) |
1189 { | 1192 { |
1190 | 1193 |
1191 if(copyas(a, v)) | 1194 if(copyas(a, v)) |
1192 return 1; | 1195 return 1; |
1193 if(v->type == D_REG) { | 1196 if(v->type == D_REG) { |
1194 if(a->type == D_CONST && a->reg != NREG) { | 1197 if(a->type == D_CONST && a->reg != NREG) { |
1195 » » » if(v->reg == a->reg) | 1198 » » » if(a->reg == v->reg) |
1196 return 1; | 1199 return 1; |
1197 } else | 1200 } else |
1198 if(a->type == D_OREG) { | 1201 if(a->type == D_OREG) { |
1199 » » » if(v->reg == a->reg) | 1202 » » » if(a->reg == v->reg) |
1200 return 1; | 1203 return 1; |
1201 } else | 1204 } else |
1202 if(a->type == D_REGREG) { | 1205 if(a->type == D_REGREG) { |
1203 » » » if(v->reg == a->reg) | 1206 » » » if(a->reg == v->reg) |
1204 return 1; | 1207 return 1; |
1205 if(a->offset == v->reg) | 1208 if(a->offset == v->reg) |
1206 return 1; | 1209 return 1; |
1207 } else | 1210 } else |
1208 if(a->type == D_SHIFT) { | 1211 if(a->type == D_SHIFT) { |
1209 if((a->offset&0xf) == v->reg) | 1212 if((a->offset&0xf) == v->reg) |
1210 return 1; | 1213 return 1; |
1211 if((a->offset&(1<<4)) && (a->offset>>8) == v->reg) | 1214 if((a->offset&(1<<4)) && (a->offset>>8) == v->reg) |
1212 return 1; | 1215 return 1; |
1213 } | 1216 } |
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1506 } | 1509 } |
1507 } | 1510 } |
1508 | 1511 |
1509 int | 1512 int |
1510 isdconst(Addr *a) | 1513 isdconst(Addr *a) |
1511 { | 1514 { |
1512 if(a->type == D_CONST && a->reg == NREG) | 1515 if(a->type == D_CONST && a->reg == NREG) |
1513 return 1; | 1516 return 1; |
1514 return 0; | 1517 return 0; |
1515 } | 1518 } |
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