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Delta Between Two Patch Sets: src/cmd/6g/prog.c

Issue 12970043: code review 12970043: cmd/gc: &x panics if x does (Closed)
Left Patch Set: Created 11 years, 7 months ago
Right Patch Set: diff -r 06602f18d127 https://code.google.com/p/go/ Created 11 years, 7 months ago
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1 // Copyright 2013 The Go Authors. All rights reserved. 1 // Copyright 2013 The Go Authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style 2 // Use of this source code is governed by a BSD-style
3 // license that can be found in the LICENSE file. 3 // license that can be found in the LICENSE file.
4 4
5 #include <u.h> 5 #include <u.h>
6 #include <libc.h> 6 #include <libc.h>
7 #include "gg.h" 7 #include "gg.h"
8 #include "opt.h" 8 #include "opt.h"
9 9
10 // Matches real RtoB but can be used in global initializer. 10 // Matches real RtoB but can be used in global initializer.
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33 // size variants of an operation even if we just use a subset. 33 // size variants of an operation even if we just use a subset.
34 // 34 //
35 // The table is formatted for 8-space tabs. 35 // The table is formatted for 8-space tabs.
36 static ProgInfo progtable[ALAST] = { 36 static ProgInfo progtable[ALAST] = {
37 [ATYPE]= {Pseudo | Skip}, 37 [ATYPE]= {Pseudo | Skip},
38 [ATEXT]= {Pseudo}, 38 [ATEXT]= {Pseudo},
39 [AFUNCDATA]= {Pseudo}, 39 [AFUNCDATA]= {Pseudo},
40 [APCDATA]= {Pseudo}, 40 [APCDATA]= {Pseudo},
41 [AUNDEF]= {OK}, 41 [AUNDEF]= {OK},
42 [AUSEFIELD]= {OK}, 42 [AUSEFIELD]= {OK},
43 [ACHECKNIL]= {LeftRead},
43 44
44 // NOP is an internal no-op that also stands 45 // NOP is an internal no-op that also stands
45 // for USED and SET annotations, not the Intel opcode. 46 // for USED and SET annotations, not the Intel opcode.
46 [ANOP]= {LeftRead | RightWrite}, 47 [ANOP]= {LeftRead | RightWrite},
47 48
48 [AADCL]= {SizeL | LeftRead | RightRdwr | SetCarry | UseCarry}, 49 [AADCL]= {SizeL | LeftRead | RightRdwr | SetCarry | UseCarry},
49 [AADCQ]= {SizeQ | LeftRead | RightRdwr | SetCarry | UseCarry}, 50 [AADCQ]= {SizeQ | LeftRead | RightRdwr | SetCarry | UseCarry},
50 [AADCW]= {SizeW | LeftRead | RightRdwr | SetCarry | UseCarry}, 51 [AADCW]= {SizeW | LeftRead | RightRdwr | SetCarry | UseCarry},
51 52
52 [AADDB]= {SizeB | LeftRead | RightRdwr | SetCarry}, 53 [AADDB]= {SizeB | LeftRead | RightRdwr | SetCarry},
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303 // Addressing makes some registers used. 304 // Addressing makes some registers used.
304 if(p->from.type >= D_INDIR) 305 if(p->from.type >= D_INDIR)
305 info->regindex |= RtoB(p->from.type-D_INDIR); 306 info->regindex |= RtoB(p->from.type-D_INDIR);
306 if(p->from.index != D_NONE) 307 if(p->from.index != D_NONE)
307 info->regindex |= RtoB(p->from.index); 308 info->regindex |= RtoB(p->from.index);
308 if(p->to.type >= D_INDIR) 309 if(p->to.type >= D_INDIR)
309 info->regindex |= RtoB(p->to.type-D_INDIR); 310 info->regindex |= RtoB(p->to.type-D_INDIR);
310 if(p->to.index != D_NONE) 311 if(p->to.index != D_NONE)
311 info->regindex |= RtoB(p->to.index); 312 info->regindex |= RtoB(p->to.index);
312 } 313 }
LEFTRIGHT

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