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1 # x86 instruction set description version 0.01. http://rsc.io/x86/ | 1 # x86 instruction set description version 0.01. http://rsc.io/x86/ |
2 # | 2 # |
3 # This file contains a block of comment lines, each beginning with #, | 3 # This file contains a block of comment lines, each beginning with #, |
4 # followed by entries in CSV format. All the # comments are at the top | 4 # followed by entries in CSV format. All the # comments are at the top |
5 # of the file, so a reader can skip past the comments and hand the | 5 # of the file, so a reader can skip past the comments and hand the |
6 # rest of the file to a standard CSV reader. | 6 # rest of the file to a standard CSV reader. |
7 # | 7 # |
8 # Each line in the CSV section contains 6 fields: | 8 # Each line in the CSV section contains 6 fields: |
9 # | 9 # |
10 # mnemonic encoding valid-32 valid-64 feature tags | 10 # mnemonic encoding valid-32 valid-64 feature tags |
11 # | 11 # |
12 # The mnemonic, encoding, valid-32, valid-64, and feature columns | 12 # The mnemonic, encoding, valid-32, valid-64, and feature columns |
13 # correspond exactly to the typical table format used to describe | 13 # correspond exactly to the typical table format used to describe |
14 # an instruction in the Intel x86-64 manual. Note that compared | 14 # an instruction in the Intel x86-64 manual. Note that compared |
15 # to the manual pages, valid-32 and valid-64 have been swapped. | 15 # to the manual pages, valid-32 and valid-64 have been swapped. |
16 # Consult the manual for details about the meaning of these fields. | 16 # Consult the manual for details about the meaning of these fields [1]. |
crawshaw
2014/05/07 12:36:10
Perhaps mention the section where the columns are
rsc
2014/05/07 18:12:34
Done.
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17 # | 17 # |
18 # The tags column contains additional tags with information about | 18 # The tags column contains additional comma-separated tags with information |
crawshaw
2014/05/07 12:36:10
comma-separated tags
rsc
2014/05/07 18:12:34
Done.
rsc
2014/05/07 18:12:34
Done.
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19 # the instructions not gleaned from the manual. The known tags are: | 19 # about the instructions not gleaned from the manual. The known tags are: |
crawshaw
2014/05/07 12:36:10
and address16/32/64, modrm_regonly, modrm_memonly.
rsc
2014/05/07 18:12:34
Done.
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20 # | 20 # |
21 # pseudo - this is a pseudo-instruction, redundant with some | 21 #» pseudo, pseudo64 - this is a pseudo-instruction, redundant with some |
crawshaw
2014/05/07 12:36:10
and pseudo64
rsc
2014/05/07 18:12:34
Done.
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22 # other instruction in the list; this one should be ignored | 22 # other instruction in the list; this one should be ignored |
23 # for the purposes of decoding. | 23 # for the purposes of decoding. |
24 # | 24 # |
25 # operand16, operand32, operand64 - this instruction interpretation | 25 # operand16, operand32, operand64 - this instruction interpretation |
26 #» is only valid in 16-bit/32-bit/64-bit mode. | 26 #» is only valid in 16-bit/32-bit/64-bit operand mode. |
27 # | |
28 #» address16, address32, address64 - this instruction interpretation | |
29 #» is only valid in 16-bit/32-bit/64-bit address mode | |
30 # | |
31 #» modrm_regonly - this instruction interpretation | |
32 #» is only valid if the modrm r/m field denotes a register. | |
33 # | |
34 #» modrm_memonly - this instruction interpretation | |
35 #» is only valid if the modrm r/m field denotes a memory reference. | |
27 # | 36 # |
28 # This file was generated by a program reading the PDF version of | 37 # This file was generated by a program reading the PDF version of |
29 # the manual, but it was then hand edited to make corrections and | 38 # the manual, but it was then hand edited to make corrections and |
30 # add the tags. The eventual plan is for the generator to write the | 39 # add the tags. The eventual plan is for the generator to write the |
31 # file directly, using the PDF and a list of modifications, but | 40 # file directly, using the PDF and a list of modifications, but |
32 # no hand editing. Then, when a new version of the manual comes out, | 41 # no hand editing. Then, when a new version of the manual comes out, |
33 # updating the list should be as easy as downloading the new PDF | 42 # updating the list should be as easy as downloading the new PDF |
34 # and invoking the generator. However, we are not there yet. | 43 # and invoking the generator. However, we are not there yet. |
44 # | |
45 # [1] In the February 2014 PDF manual at | |
46 # http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-a rchitectures-software-developer-manual-325462.pdf | |
47 # the instruction format is described in Volume 2, Section 3.1.1, starting on pa ge 487. | |
35 # | 48 # |
36 "AAA","37","V","I","","" | 49 "AAA","37","V","I","","" |
37 "AAD imm8u","D5 ib","V","I","","" | 50 "AAD imm8u","D5 ib","V","I","","" |
38 "AAD","D5 0A","V","I","","pseudo" | 51 "AAD","D5 0A","V","I","","pseudo" |
39 "AAM imm8u","D4 ib","V","I","","" | 52 "AAM imm8u","D4 ib","V","I","","" |
40 "AAM","D4 0A","V","I","","pseudo" | 53 "AAM","D4 0A","V","I","","pseudo" |
41 "AAS","3F","V","I","","" | 54 "AAS","3F","V","I","","" |
42 "ADC AL, imm8u","14 ib","V","V","","" | 55 "ADC AL, imm8u","14 ib","V","V","","" |
43 "ADC AX, imm16","15 iw","V","V","","operand16" | 56 "ADC AX, imm16","15 iw","V","V","","operand16" |
44 "ADC EAX, imm32","15 id","V","V","","operand32" | 57 "ADC EAX, imm32","15 id","V","V","","operand32" |
(...skipping 149 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
194 "CMOVAE r32, r/m32","0F 43 /r","V","V","","operand32" | 207 "CMOVAE r32, r/m32","0F 43 /r","V","V","","operand32" |
195 "CMOVAE r64, r/m64","REX.W + 0F 43 /r","N.E.","V","","" | 208 "CMOVAE r64, r/m64","REX.W + 0F 43 /r","N.E.","V","","" |
196 "CMOVB r16, r/m16","0F 42 /r","V","V","","operand16" | 209 "CMOVB r16, r/m16","0F 42 /r","V","V","","operand16" |
197 "CMOVB r32, r/m32","0F 42 /r","V","V","","operand32" | 210 "CMOVB r32, r/m32","0F 42 /r","V","V","","operand32" |
198 "CMOVB r64, r/m64","REX.W + 0F 42 /r","N.E.","V","","" | 211 "CMOVB r64, r/m64","REX.W + 0F 42 /r","N.E.","V","","" |
199 "CMOVBE r16, r/m16","0F 46 /r","V","V","","operand16" | 212 "CMOVBE r16, r/m16","0F 46 /r","V","V","","operand16" |
200 "CMOVBE r32, r/m32","0F 46 /r","V","V","","operand32" | 213 "CMOVBE r32, r/m32","0F 46 /r","V","V","","operand32" |
201 "CMOVBE r64, r/m64","REX.W + 0F 46 /r","N.E.","V","","" | 214 "CMOVBE r64, r/m64","REX.W + 0F 46 /r","N.E.","V","","" |
202 "CMOVC r16, r/m16","0F 42 /r","V","V","","pseudo,operand16" | 215 "CMOVC r16, r/m16","0F 42 /r","V","V","","pseudo,operand16" |
203 "CMOVC r32, r/m32","0F 42 /r","V","V","","pseudo,operand32" | 216 "CMOVC r32, r/m32","0F 42 /r","V","V","","pseudo,operand32" |
204 "CMOVC r64, r/m64","REX.W + 0F 42 /r","N.E.","V","","pseudo," | 217 "CMOVC r64, r/m64","REX.W + 0F 42 /r","N.E.","V","","pseudo," |
crawshaw
2014/05/07 12:36:10
It's a bit odd to see the trailing comma in "pseud
| |
205 "CMOVE r16, r/m16","0F 44 /r","V","V","","operand16" | 218 "CMOVE r16, r/m16","0F 44 /r","V","V","","operand16" |
206 "CMOVE r32, r/m32","0F 44 /r","V","V","","operand32" | 219 "CMOVE r32, r/m32","0F 44 /r","V","V","","operand32" |
207 "CMOVE r64, r/m64","REX.W + 0F 44 /r","N.E.","V","","" | 220 "CMOVE r64, r/m64","REX.W + 0F 44 /r","N.E.","V","","" |
208 "CMOVG r16, r/m16","0F 4F /r","V","V","","operand16" | 221 "CMOVG r16, r/m16","0F 4F /r","V","V","","operand16" |
209 "CMOVG r32, r/m32","0F 4F /r","V","V","","operand32" | 222 "CMOVG r32, r/m32","0F 4F /r","V","V","","operand32" |
210 "CMOVG r64, r/m64","REX.W + 0F 4F /r","N.E.","V","","" | 223 "CMOVG r64, r/m64","REX.W + 0F 4F /r","N.E.","V","","" |
211 "CMOVGE r16, r/m16","0F 4D /r","V","V","","operand16" | 224 "CMOVGE r16, r/m16","0F 4D /r","V","V","","operand16" |
212 "CMOVGE r32, r/m32","0F 4D /r","V","V","","operand32" | 225 "CMOVGE r32, r/m32","0F 4D /r","V","V","","operand32" |
213 "CMOVGE r64, r/m64","REX.W + 0F 4D /r","N.E.","V","","" | 226 "CMOVGE r64, r/m64","REX.W + 0F 4D /r","N.E.","V","","" |
214 "CMOVL r16, r/m16","0F 4C /r","V","V","","operand16" | 227 "CMOVL r16, r/m16","0F 4C /r","V","V","","operand16" |
(...skipping 2095 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
2310 "XSAVE mem","0F AE /4","V","V","","" | 2323 "XSAVE mem","0F AE /4","V","V","","" |
2311 "XSAVE64 mem","REX.W + 0F AE /4","N.E.","V","","" | 2324 "XSAVE64 mem","REX.W + 0F AE /4","N.E.","V","","" |
2312 "XSAVEC mem","0F C7 /4","V","V","","" | 2325 "XSAVEC mem","0F C7 /4","V","V","","" |
2313 "XSAVEC64 mem","REX.W + 0F C7 /4","N.E.","V","","" | 2326 "XSAVEC64 mem","REX.W + 0F C7 /4","N.E.","V","","" |
2314 "XSAVEOPT mem","0F AE /6","V","V","XSAVEOPT","" | 2327 "XSAVEOPT mem","0F AE /6","V","V","XSAVEOPT","" |
2315 "XSAVEOPT64 mem","REX.W + 0F AE /6","V","V","XSAVEOPT","" | 2328 "XSAVEOPT64 mem","REX.W + 0F AE /6","V","V","XSAVEOPT","" |
2316 "XSAVES mem","0F C7 /5","V","V","","" | 2329 "XSAVES mem","0F C7 /5","V","V","","" |
2317 "XSAVES64 mem","REX.W + 0F C7 /5","N.E.","V","","" | 2330 "XSAVES64 mem","REX.W + 0F C7 /5","N.E.","V","","" |
2318 "XSETBV","0F 01 D1","V","V","","" | 2331 "XSETBV","0F 01 D1","V","V","","" |
2319 "XTEST","0F 01 D6","V","V","HLE or RTM","" | 2332 "XTEST","0F 01 D6","V","V","HLE or RTM","" |
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