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1 /* -*- Mode:C++; c-file-style:"gnu"; indent-tabs-mode:nil; -*- */ | 1 /* -*- Mode:C++; c-file-style:"gnu"; indent-tabs-mode:nil; -*- */ |
2 /* | 2 /* |
3 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC) | 3 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC) |
4 * | 4 * |
5 * This program is free software; you can redistribute it and/or modify | 5 * This program is free software; you can redistribute it and/or modify |
6 * it under the terms of the GNU General Public License version 2 as | 6 * it under the terms of the GNU General Public License version 2 as |
7 * published by the Free Software Foundation; | 7 * published by the Free Software Foundation; |
8 * | 8 * |
9 * This program is distributed in the hope that it will be useful, | 9 * This program is distributed in the hope that it will be useful, |
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of | 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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216 { | 216 { |
217 NS_LOG_FUNCTION (this << " New LC, rnti: " << params.m_rnti); | 217 NS_LOG_FUNCTION (this << " New LC, rnti: " << params.m_rnti); |
218 | 218 |
219 std::map <uint16_t, pssFlowPerf_t>::iterator it; | 219 std::map <uint16_t, pssFlowPerf_t>::iterator it; |
220 for (uint16_t i = 0; i < params.m_logicalChannelConfigList.size (); i++) | 220 for (uint16_t i = 0; i < params.m_logicalChannelConfigList.size (); i++) |
221 { | 221 { |
222 it = m_flowStatsDl.find (params.m_rnti); | 222 it = m_flowStatsDl.find (params.m_rnti); |
223 | 223 |
224 if (it == m_flowStatsDl.end ()) | 224 if (it == m_flowStatsDl.end ()) |
225 { | 225 { |
226 double tbrDlInBytes = static_cast<double>(params.m_logicalChannelConfi
gList.at (i).m_eRabGuaranteedBitrateDl / 8); // byte/s | 226 double tbrDlInBytes = params.m_logicalChannelConfigList.at (i).m_eRabG
uaranteedBitrateDl / 8.0; // byte/s |
227 double tbrUlInBytes = static_cast<double>(params.m_logicalChannelConfi
gList.at (i).m_eRabGuaranteedBitrateUl / 8); // byte/s | 227 double tbrUlInBytes = params.m_logicalChannelConfigList.at (i).m_eRabG
uaranteedBitrateUl / 8.0; // byte/s |
228 | 228 |
229 pssFlowPerf_t flowStatsDl; | 229 pssFlowPerf_t flowStatsDl; |
230 flowStatsDl.flowStart = Simulator::Now (); | 230 flowStatsDl.flowStart = Simulator::Now (); |
231 flowStatsDl.totalBytesTransmitted = 0; | 231 flowStatsDl.totalBytesTransmitted = 0; |
232 flowStatsDl.lastTtiBytesTransmitted = 0; | 232 flowStatsDl.lastTtiBytesTransmitted = 0; |
233 flowStatsDl.lastAveragedThroughput = 1; | 233 flowStatsDl.lastAveragedThroughput = 1; |
234 flowStatsDl.secondLastAveragedThroughput = 1; | 234 flowStatsDl.secondLastAveragedThroughput = 1; |
235 flowStatsDl.targetThroughput = tbrDlInBytes; | 235 flowStatsDl.targetThroughput = tbrDlInBytes; |
236 m_flowStatsDl.insert (std::pair<uint16_t, pssFlowPerf_t> (params.m_rnt
i, flowStatsDl)); | 236 m_flowStatsDl.insert (std::pair<uint16_t, pssFlowPerf_t> (params.m_rnt
i, flowStatsDl)); |
237 pssFlowPerf_t flowStatsUl; | 237 pssFlowPerf_t flowStatsUl; |
238 flowStatsUl.flowStart = Simulator::Now (); | 238 flowStatsUl.flowStart = Simulator::Now (); |
239 flowStatsUl.totalBytesTransmitted = 0; | 239 flowStatsUl.totalBytesTransmitted = 0; |
240 flowStatsUl.lastTtiBytesTransmitted = 0; | 240 flowStatsUl.lastTtiBytesTransmitted = 0; |
241 flowStatsUl.lastAveragedThroughput = 1; | 241 flowStatsUl.lastAveragedThroughput = 1; |
242 flowStatsUl.secondLastAveragedThroughput = 1; | 242 flowStatsUl.secondLastAveragedThroughput = 1; |
243 flowStatsUl.targetThroughput = tbrUlInBytes; | 243 flowStatsUl.targetThroughput = tbrUlInBytes; |
244 m_flowStatsUl.insert (std::pair<uint16_t, pssFlowPerf_t> (params.m_rnt
i, flowStatsUl)); | 244 m_flowStatsUl.insert (std::pair<uint16_t, pssFlowPerf_t> (params.m_rnt
i, flowStatsUl)); |
245 } | 245 } |
246 else | 246 else |
247 { | 247 { |
248 // update GBR from UeManager::SetupDataRadioBearer () | 248 // update GBR from UeManager::SetupDataRadioBearer () |
249 double tbrDlInBytes = static_cast<double>(params.m_logicalChannelConfi
gList.at (i).m_eRabGuaranteedBitrateDl / 8); // byte/s | 249 double tbrDlInBytes = params.m_logicalChannelConfigList.at (i).m_eRabG
uaranteedBitrateDl / 8.0; // byte/s |
250 double tbrUlInBytes = static_cast<double>(params.m_logicalChannelConfi
gList.at (i).m_eRabGuaranteedBitrateUl / 8); // byte/s | 250 double tbrUlInBytes = params.m_logicalChannelConfigList.at (i).m_eRabG
uaranteedBitrateUl / 8.0; // byte/s |
251 m_flowStatsDl[(*it).first].targetThroughput = tbrDlInBytes; | 251 m_flowStatsDl[(*it).first].targetThroughput = tbrDlInBytes; |
252 m_flowStatsUl[(*it).first].targetThroughput = tbrUlInBytes; | 252 m_flowStatsUl[(*it).first].targetThroughput = tbrUlInBytes; |
253 } | 253 } |
254 } | 254 } |
255 | 255 |
256 return; | 256 return; |
257 } | 257 } |
258 | 258 |
259 void | 259 void |
260 PssFfMacScheduler::DoCschedLcReleaseReq (const struct FfMacCschedSapProvider::Cs
chedLcReleaseReqParameters& params) | 260 PssFfMacScheduler::DoCschedLcReleaseReq (const struct FfMacCschedSapProvider::Cs
chedLcReleaseReqParameters& params) |
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535 { | 535 { |
536 if ((*it) == true ) | 536 if ((*it) == true ) |
537 { | 537 { |
538 rbgAllocatedNum++; | 538 rbgAllocatedNum++; |
539 } | 539 } |
540 } | 540 } |
541 | 541 |
542 FfMacSchedSapUser::SchedDlConfigIndParameters ret; | 542 FfMacSchedSapUser::SchedDlConfigIndParameters ret; |
543 | 543 |
544 // update UL HARQ proc id | 544 // update UL HARQ proc id |
545 std::map <uint16_t, uint8_t>::iterator itProcId; | 545 for (std::map <uint16_t, uint8_t>::iterator itProcId = m_ulHarqCurrentProcessI
d.begin (); itProcId != m_ulHarqCurrentProcessId.end (); itProcId++) |
546 for (itProcId = m_ulHarqCurrentProcessId.begin (); itProcId != m_ulHarqCurrent
ProcessId.end (); itProcId++) | |
547 { | 546 { |
548 (*itProcId).second = ((*itProcId).second + 1) % HARQ_PROC_NUM; | 547 (*itProcId).second = ((*itProcId).second + 1) % HARQ_PROC_NUM; |
549 } | 548 } |
550 | 549 |
551 // RACH Allocation | 550 // RACH Allocation |
552 uint16_t rbAllocatedNum = 0; | 551 uint16_t rbAllocatedNum = 0; |
553 std::vector <bool> ulRbMap; | 552 std::vector <bool> ulRbMap; |
554 ulRbMap.resize (m_cschedCellConfig.m_ulBandwidth, false); | 553 ulRbMap.resize (m_cschedCellConfig.m_ulBandwidth, false); |
555 ulRbMap = m_ffrSapProvider->GetAvailableUlRbg (); | 554 ulRbMap = m_ffrSapProvider->GetAvailableUlRbg (); |
556 uint8_t maxContinuousUlBandwidth = 0; | 555 uint8_t maxContinuousUlBandwidth = 0; |
557 uint8_t tmpMinBandwidth = 0; | 556 uint8_t tmpMinBandwidth = 0; |
558 uint16_t ffrRbStartOffset = 0; | 557 uint8_t ffrRbStartOffset = 0; |
559 uint16_t tmpFfrRbStartOffset = 0; | 558 uint8_t tmpFfrRbStartOffset = 0; |
560 uint16_t index = 0; | 559 uint8_t index = 0; |
561 | 560 |
562 for (std::vector<bool>::iterator it = ulRbMap.begin (); it != ulRbMap.end ();
it++) | 561 for (std::vector<bool>::iterator it = ulRbMap.begin (); it != ulRbMap.end ();
it++) |
563 { | 562 { |
564 if ((*it) == true ) | 563 if ((*it) == true ) |
565 { | 564 { |
566 rbAllocatedNum++; | 565 rbAllocatedNum++; |
567 if (tmpMinBandwidth > maxContinuousUlBandwidth) | 566 if (tmpMinBandwidth > maxContinuousUlBandwidth) |
568 { | 567 { |
569 maxContinuousUlBandwidth = tmpMinBandwidth; | 568 maxContinuousUlBandwidth = tmpMinBandwidth; |
570 ffrRbStartOffset = tmpFfrRbStartOffset; | 569 ffrRbStartOffset = tmpFfrRbStartOffset; |
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582 index++; | 581 index++; |
583 } | 582 } |
584 | 583 |
585 if (tmpMinBandwidth > maxContinuousUlBandwidth) | 584 if (tmpMinBandwidth > maxContinuousUlBandwidth) |
586 { | 585 { |
587 maxContinuousUlBandwidth = tmpMinBandwidth; | 586 maxContinuousUlBandwidth = tmpMinBandwidth; |
588 ffrRbStartOffset = tmpFfrRbStartOffset; | 587 ffrRbStartOffset = tmpFfrRbStartOffset; |
589 } | 588 } |
590 | 589 |
591 m_rachAllocationMap.resize (m_cschedCellConfig.m_ulBandwidth, 0); | 590 m_rachAllocationMap.resize (m_cschedCellConfig.m_ulBandwidth, 0); |
592 uint16_t rbStart = 0; | 591 uint8_t rbStart = 0; |
593 rbStart = ffrRbStartOffset; | 592 rbStart = ffrRbStartOffset; |
594 std::vector <struct RachListElement_s>::iterator itRach; | 593 std::vector <struct RachListElement_s>::iterator itRach; |
595 for (itRach = m_rachList.begin (); itRach != m_rachList.end (); itRach++) | 594 for (itRach = m_rachList.begin (); itRach != m_rachList.end (); itRach++) |
596 { | 595 { |
597 NS_ASSERT_MSG (m_amc->GetTbSizeFromMcs (m_ulGrantMcs, m_cschedCellConfig.m
_ulBandwidth) > (*itRach).m_estimatedSize, " Default UL Grant MCS does not allow
to send RACH messages"); | 596 NS_ASSERT_MSG (m_amc->GetUlTbSizeFromMcs (m_ulGrantMcs, m_cschedCellConfig
.m_ulBandwidth) > (*itRach).m_estimatedSize, " Default UL Grant MCS does not all
ow to send RACH messages"); |
598 BuildRarListElement_s newRar; | 597 BuildRarListElement_s newRar; |
599 newRar.m_rnti = (*itRach).m_rnti; | 598 newRar.m_rnti = (*itRach).m_rnti; |
600 // DL-RACH Allocation | 599 // DL-RACH Allocation |
601 // Ideal: no needs of configuring m_dci | 600 // Ideal: no needs of configuring m_dci |
602 // UL-RACH Allocation | 601 // UL-RACH Allocation |
603 newRar.m_grant.m_rnti = newRar.m_rnti; | 602 newRar.m_grant.m_rnti = newRar.m_rnti; |
604 newRar.m_grant.m_mcs = m_ulGrantMcs; | 603 newRar.m_grant.m_mcs = m_ulGrantMcs; |
605 uint16_t rbLen = 1; | 604 uint8_t rbLen = 1; |
606 uint16_t tbSizeBits = 0; | 605 uint16_t tbSizeBits = 0; |
607 // find lowest TB size that fits UL grant estimated size | 606 // find lowest TB size that fits UL grant estimated size |
608 while ((tbSizeBits < (*itRach).m_estimatedSize) && (rbStart + rbLen < (ffr
RbStartOffset + maxContinuousUlBandwidth))) | 607 while ((tbSizeBits < (*itRach).m_estimatedSize) && (rbStart + rbLen < (ffr
RbStartOffset + maxContinuousUlBandwidth))) |
609 { | 608 { |
610 rbLen++; | 609 rbLen++; |
611 tbSizeBits = static_cast<uint16_t>(m_amc->GetTbSizeFromMcs (m_ulGrantM
cs, rbLen)); | 610 tbSizeBits = m_amc->GetUlTbSizeFromMcs (m_ulGrantMcs, rbLen); |
612 } | 611 } |
613 if (tbSizeBits < (*itRach).m_estimatedSize) | 612 if (tbSizeBits < (*itRach).m_estimatedSize) |
614 { | 613 { |
615 // no more allocation space: finish allocation | 614 // no more allocation space: finish allocation |
616 break; | 615 break; |
617 } | 616 } |
618 newRar.m_grant.m_rbStart = static_cast<uint8_t>(rbStart); | 617 newRar.m_grant.m_rbStart = rbStart; |
619 newRar.m_grant.m_rbLen = static_cast<uint8_t>(rbLen); | 618 newRar.m_grant.m_rbLen = rbLen; |
620 newRar.m_grant.m_tbSize = tbSizeBits / 8; | 619 newRar.m_grant.m_tbSize = tbSizeBits / 8; |
621 newRar.m_grant.m_hopping = false; | 620 newRar.m_grant.m_hopping = false; |
622 newRar.m_grant.m_tpc = 0; | 621 newRar.m_grant.m_tpc = 0; |
623 newRar.m_grant.m_cqiRequest = false; | 622 newRar.m_grant.m_cqiRequest = false; |
624 newRar.m_grant.m_ulDelay = false; | 623 newRar.m_grant.m_ulDelay = false; |
625 NS_LOG_INFO (this << " UL grant allocated to RNTI " << (*itRach).m_rnti <<
" rbStart " << rbStart << " rbLen " << rbLen << " MCS " << m_ulGrantMcs << " tb
Size " << newRar.m_grant.m_tbSize); | 624 NS_LOG_INFO (this << " UL grant allocated to RNTI " << (*itRach).m_rnti <<
" rbStart " << rbStart << " rbLen " << rbLen << " MCS " << m_ulGrantMcs << " tb
Size " << newRar.m_grant.m_tbSize); |
626 for (uint16_t i = rbStart; i < rbStart + rbLen; i++) | 625 for (uint16_t i = rbStart; i < rbStart + rbLen; i++) |
627 { | 626 { |
628 m_rachAllocationMap.at (i) = (*itRach).m_rnti; | 627 m_rachAllocationMap.at (i) = (*itRach).m_rnti; |
629 } | 628 } |
630 | 629 |
631 if (m_harqOn == true) | 630 if (m_harqOn == true) |
632 { | 631 { |
633 // generate UL-DCI for HARQ retransmissions | 632 // generate UL-DCI for HARQ retransmissions |
634 UlDciListElement_s uldci; | 633 UlDciListElement_s uldci; |
635 uldci.m_rnti = newRar.m_rnti; | 634 uldci.m_rnti = newRar.m_rnti; |
636 uldci.m_rbLen = static_cast<uint8_t>(rbLen); | 635 uldci.m_rbLen = rbLen; |
637 uldci.m_rbStart = static_cast<uint8_t>(rbStart); | 636 uldci.m_rbStart = rbStart; |
638 uldci.m_mcs = m_ulGrantMcs; | 637 uldci.m_mcs = m_ulGrantMcs; |
639 uldci.m_tbSize = tbSizeBits / 8; | 638 uldci.m_tbSize = tbSizeBits / 8; |
640 uldci.m_ndi = 1; | 639 uldci.m_ndi = 1; |
641 uldci.m_cceIndex = 0; | 640 uldci.m_cceIndex = 0; |
642 uldci.m_aggrLevel = 1; | 641 uldci.m_aggrLevel = 1; |
643 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF | 642 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF |
644 uldci.m_hopping = false; | 643 uldci.m_hopping = false; |
645 uldci.m_n2Dmrs = 0; | 644 uldci.m_n2Dmrs = 0; |
646 uldci.m_tpc = 0; // no power control | 645 uldci.m_tpc = 0; // no power control |
647 uldci.m_cqiRequest = false; // only period CQI at this stage | 646 uldci.m_cqiRequest = false; // only period CQI at this stage |
648 uldci.m_ulIndex = 0; // TDD parameter | 647 uldci.m_ulIndex = 0; // TDD parameter |
649 uldci.m_dai = 1; // TDD parameter | 648 uldci.m_dai = 1; // TDD parameter |
650 uldci.m_freqHopping = 0; | 649 uldci.m_freqHopping = 0; |
651 uldci.m_pdcchPowerOffset = 0; // not used | 650 uldci.m_pdcchPowerOffset = 0; // not used |
652 | 651 |
653 uint8_t harqId = 0; | 652 uint8_t harqId = 0; |
654 std::map <uint16_t, uint8_t>::iterator itProcId1; | 653 std::map <uint16_t, uint8_t>::iterator itProcId; |
655 itProcId1 = m_ulHarqCurrentProcessId.find (uldci.m_rnti); | 654 itProcId = m_ulHarqCurrentProcessId.find (uldci.m_rnti); |
656 if (itProcId1 == m_ulHarqCurrentProcessId.end ()) | 655 if (itProcId == m_ulHarqCurrentProcessId.end ()) |
657 { | 656 { |
658 NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << uldci.m_r
nti); | 657 NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << uldci.m_r
nti); |
659 } | 658 } |
660 harqId = (*itProcId1).second; | 659 harqId = (*itProcId).second; |
661 std::map <uint16_t, UlHarqProcessesDciBuffer_t>::iterator itDci = m_ul
HarqProcessesDciBuffer.find (uldci.m_rnti); | 660 std::map <uint16_t, UlHarqProcessesDciBuffer_t>::iterator itDci = m_ul
HarqProcessesDciBuffer.find (uldci.m_rnti); |
662 if (itDci == m_ulHarqProcessesDciBuffer.end ()) | 661 if (itDci == m_ulHarqProcessesDciBuffer.end ()) |
663 { | 662 { |
664 NS_FATAL_ERROR ("Unable to find RNTI entry in UL DCI HARQ buffer f
or RNTI " << uldci.m_rnti); | 663 NS_FATAL_ERROR ("Unable to find RNTI entry in UL DCI HARQ buffer f
or RNTI " << uldci.m_rnti); |
665 } | 664 } |
666 (*itDci).second.at (harqId) = uldci; | 665 (*itDci).second.at (harqId) = uldci; |
667 } | 666 } |
668 | 667 |
669 rbStart = rbStart + rbLen; | 668 rbStart = rbStart + rbLen; |
670 ret.m_buildRarList.push_back (newRar); | 669 ret.m_buildRarList.push_back (newRar); |
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941 { | 940 { |
942 // all the RBGs are already allocated -> exit | 941 // all the RBGs are already allocated -> exit |
943 if ((ret.m_buildDataList.size () > 0) || (ret.m_buildRarList.size () > 0)) | 942 if ((ret.m_buildDataList.size () > 0) || (ret.m_buildRarList.size () > 0)) |
944 { | 943 { |
945 m_schedSapUser->SchedDlConfigInd (ret); | 944 m_schedSapUser->SchedDlConfigInd (ret); |
946 } | 945 } |
947 return; | 946 return; |
948 } | 947 } |
949 | 948 |
950 | 949 |
951 std::map <uint16_t, pssFlowPerf_t>::iterator it; | |
952 std::map <uint16_t, pssFlowPerf_t> tdUeSet; // the result of TD scheduler | 950 std::map <uint16_t, pssFlowPerf_t> tdUeSet; // the result of TD scheduler |
953 | 951 |
954 // schedulability check | 952 // schedulability check |
955 std::map <uint16_t, pssFlowPerf_t> ueSet; | 953 std::map <uint16_t, pssFlowPerf_t> ueSet; |
956 for (it = m_flowStatsDl.begin (); it != m_flowStatsDl.end (); it++) | 954 for (std::map <uint16_t, pssFlowPerf_t>::iterator it = m_flowStatsDl.begin ();
it != m_flowStatsDl.end (); it++) |
957 { | 955 { |
958 if( LcActivePerFlow ((*it).first) > 0 ) | 956 if( LcActivePerFlow ((*it).first) > 0 ) |
959 { | 957 { |
960 ueSet.insert(std::pair <uint16_t, pssFlowPerf_t> ((*it).first, (*it).s
econd)); | 958 ueSet.insert(std::pair <uint16_t, pssFlowPerf_t> ((*it).first, (*it).s
econd)); |
961 } | 959 } |
962 } | 960 } |
963 | 961 |
964 if (ueSet.size() != 0) | 962 if (ueSet.size() != 0) |
965 { // has data in RLC buffer | 963 { // has data in RLC buffer |
966 | 964 |
967 // Time Domain scheduler | 965 // Time Domain scheduler |
968 std::vector <std::pair<double, uint16_t> > ueSet1; | 966 std::vector <std::pair<double, uint16_t> > ueSet1; |
969 std::vector <std::pair<double,uint16_t> > ueSet2; | 967 std::vector <std::pair<double,uint16_t> > ueSet2; |
970 for (it = ueSet.begin (); it != ueSet.end (); it++) | 968 for (std::map <uint16_t, pssFlowPerf_t>::iterator it = ueSet.begin (); it
!= ueSet.end (); it++) |
971 { | 969 { |
972 std::set <uint16_t>::iterator itRnti = rntiAllocated.find ((*it).first
); | 970 std::set <uint16_t>::iterator itRnti = rntiAllocated.find ((*it).first
); |
973 if ((itRnti != rntiAllocated.end ())||(!HarqProcessAvailability ((*it)
.first))) | 971 if ((itRnti != rntiAllocated.end ())||(!HarqProcessAvailability ((*it)
.first))) |
974 { | 972 { |
975 // UE already allocated for HARQ or without HARQ process available
-> drop it | 973 // UE already allocated for HARQ or without HARQ process available
-> drop it |
976 if (itRnti != rntiAllocated.end ()) | 974 if (itRnti != rntiAllocated.end ()) |
977 { | 975 { |
978 NS_LOG_DEBUG (this << " RNTI discared for HARQ tx" << (uint16_t)
(*it).first); | 976 NS_LOG_DEBUG (this << " RNTI discared for HARQ tx" << (uint16_t)
(*it).first); |
979 } | 977 } |
980 if (!HarqProcessAvailability ((*it).first)) | 978 if (!HarqProcessAvailability ((*it).first)) |
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1041 } | 1039 } |
1042 ···· | 1040 ···· |
1043 if (wbCqi > 0) | 1041 if (wbCqi > 0) |
1044 { | 1042 { |
1045 if (LcActivePerFlow ((*it).first) > 0) | 1043 if (LcActivePerFlow ((*it).first) > 0) |
1046 { | 1044 { |
1047 // this UE has data to transmit | 1045 // this UE has data to transmit |
1048 double achievableRate = 0.0; | 1046 double achievableRate = 0.0; |
1049 for (uint8_t k = 0; k < nLayer; k++)· | 1047 for (uint8_t k = 0; k < nLayer; k++)· |
1050 { | 1048 { |
1051 uint8_t mcs = 0;· | 1049 uint8_t mcs = m_amc->GetMcsFromCqi (wbCqi); |
1052 mcs = static_cast<uint8_t>(m_amc->GetMcsFromCqi (wbCqi
)); | 1050 achievableRate += ((m_amc->GetDlTbSizeFromMcs (mcs, rb
gSize) / 8) / 0.001); // = TB size / TTI |
1053 achievableRate += ((m_amc->GetTbSizeFromMcs (mcs, rbgS
ize) / 8) / 0.001); // = TB size / TTI | |
1054 } | 1051 } |
1055 ···· | 1052 ···· |
1056 metric = achievableRate / (*it).second.lastAveragedThrough
put; | 1053 metric = achievableRate / (*it).second.lastAveragedThrough
put; |
1057 } | 1054 } |
1058 ueSet2.push_back(std::pair<double, uint16_t> (metric, (*it).fi
rst)); | 1055 ueSet2.push_back(std::pair<double, uint16_t> (metric, (*it).fi
rst)); |
1059 } // end of wbCqi | 1056 } // end of wbCqi |
1060 } | 1057 } |
1061 }// end of ueSet | 1058 }// end of ueSet |
1062 ···· | 1059 ···· |
1063 ···· | 1060 ···· |
1064 if (ueSet1.size () != 0 || ueSet2.size () != 0) | 1061 if (ueSet1.size () != 0 || ueSet2.size () != 0) |
1065 { | 1062 { |
1066 // sorting UE in ueSet1 and ueSet1 in descending order based on their
metric value | 1063 // sorting UE in ueSet1 and ueSet1 in descending order based on their
metric value |
1067 std::sort (ueSet1.rbegin (), ueSet1.rend ()); | 1064 std::sort (ueSet1.rbegin (), ueSet1.rend ()); |
1068 std::sort (ueSet2.rbegin (), ueSet2.rend ()); | 1065 std::sort (ueSet2.rbegin (), ueSet2.rend ()); |
1069 · | 1066 · |
1070 // select UE set for frequency domain scheduler | 1067 // select UE set for frequency domain scheduler |
1071 uint32_t nMux; | 1068 uint32_t nMux; |
1072 if ( m_nMux > 0) | 1069 if ( m_nMux > 0) |
1073 nMux = m_nMux; | 1070 nMux = m_nMux; |
1074 else | 1071 else |
1075 { | 1072 { |
1076 // select half number of UE | 1073 // select half number of UE |
1077 if (ueSet1.size() + ueSet2.size() <=2 ) | 1074 if (ueSet1.size() + ueSet2.size() <=2 ) |
1078 nMux = 1; | 1075 nMux = 1; |
1079 else | 1076 else |
1080 nMux = (int)((ueSet1.size() + ueSet2.size()) / 2) ; // TD schedu
ler only transfers half selected UE per RTT to TD scheduler | 1077 nMux = (int)((ueSet1.size() + ueSet2.size()) / 2) ; // TD schedu
ler only transfers half selected UE per RTT to TD scheduler |
1081 } | 1078 } |
1082 for (it = m_flowStatsDl.begin (); it != m_flowStatsDl.end (); it--) | 1079 for (std::map <uint16_t, pssFlowPerf_t>::iterator it = m_flowStatsDl.b
egin (); it != m_flowStatsDl.end (); it--) |
1083 { | 1080 { |
1084 std::vector <std::pair<double, uint16_t> >::iterator itSet; | 1081 std::vector <std::pair<double, uint16_t> >::iterator itSet; |
1085 for (itSet = ueSet1.begin (); itSet != ueSet1.end () && nMux != 0;
itSet++) | 1082 for (itSet = ueSet1.begin (); itSet != ueSet1.end () && nMux != 0;
itSet++) |
1086 {·· | 1083 {·· |
1087 std::map <uint16_t, pssFlowPerf_t>::iterator itUe; | 1084 std::map <uint16_t, pssFlowPerf_t>::iterator itUe; |
1088 itUe = m_flowStatsDl.find((*itSet).second); | 1085 itUe = m_flowStatsDl.find((*itSet).second); |
1089 tdUeSet.insert(std::pair<uint16_t, pssFlowPerf_t> ( (*itUe).fir
st, (*itUe).second ) ); | 1086 tdUeSet.insert(std::pair<uint16_t, pssFlowPerf_t> ( (*itUe).fir
st, (*itUe).second ) ); |
1090 nMux--; | 1087 nMux--; |
1091 } | 1088 } |
1092 ··········· | 1089 ··········· |
(...skipping 11 matching lines...) Expand all Loading... |
1104 if (nMux == 0) | 1101 if (nMux == 0) |
1105 break; | 1102 break; |
1106 ········ | 1103 ········ |
1107 } // end of m_flowStatsDl | 1104 } // end of m_flowStatsDl |
1108 ········ | 1105 ········ |
1109 ········ | 1106 ········ |
1110 if ( m_fdSchedulerType.compare("CoItA") == 0) | 1107 if ( m_fdSchedulerType.compare("CoItA") == 0) |
1111 { | 1108 { |
1112 // FD scheduler: Carrier over Interference to Average (CoItA) | 1109 // FD scheduler: Carrier over Interference to Average (CoItA) |
1113 std::map < uint16_t, uint8_t > sbCqiSum; | 1110 std::map < uint16_t, uint8_t > sbCqiSum; |
1114 for (it = tdUeSet.begin (); it != tdUeSet.end (); it++) | 1111 for (std::map <uint16_t, pssFlowPerf_t>::iterator it = tdUeSet.beg
in (); it != tdUeSet.end (); it++) |
1115 { | 1112 { |
1116 uint8_t sum = 0; | 1113 uint8_t sum = 0; |
1117 for (int i = 0; i < rbgNum; i++) | 1114 for (int i = 0; i < rbgNum; i++) |
1118 { | 1115 { |
1119 std::map <uint16_t,SbMeasResult_s>::iterator itCqi; | 1116 std::map <uint16_t,SbMeasResult_s>::iterator itCqi; |
1120 itCqi = m_a30CqiRxed.find ((*it).first); | 1117 itCqi = m_a30CqiRxed.find ((*it).first); |
1121 std::map <uint16_t,uint8_t>::iterator itTxMode; | 1118 std::map <uint16_t,uint8_t>::iterator itTxMode; |
1122 itTxMode = m_uesTxMode.find ((*it).first); | 1119 itTxMode = m_uesTxMode.find ((*it).first); |
1123 if (itTxMode == m_uesTxMode.end ()) | 1120 if (itTxMode == m_uesTxMode.end ()) |
1124 { | 1121 { |
(...skipping 35 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1160 sbCqi = 0; | 1157 sbCqi = 0; |
1161 } | 1158 } |
1162 sum += sbCqi; | 1159 sum += sbCqi; |
1163 } | 1160 } |
1164 } // end if cqi | 1161 } // end if cqi |
1165 }// end of rbgNum | 1162 }// end of rbgNum |
1166 ·············· | 1163 ·············· |
1167 sbCqiSum.insert (std::pair<uint16_t, uint8_t> ((*it).first, su
m)); | 1164 sbCqiSum.insert (std::pair<uint16_t, uint8_t> ((*it).first, su
m)); |
1168 }// end tdUeSet | 1165 }// end tdUeSet |
1169 ········ | 1166 ········ |
1170 for (int i = 0; i < rbgNum; i++) | 1167 for (uint16_t i = 0; i < rbgNum; i++) |
1171 { | 1168 { |
1172 if (rbgMap.at (i) == true) | 1169 if (rbgMap.at (i) == true) |
1173 continue; | 1170 continue; |
1174 | 1171 |
1175 std::map <uint16_t, pssFlowPerf_t>::iterator itMax = tdUeSet.e
nd (); | 1172 std::map <uint16_t, pssFlowPerf_t>::iterator itMax = tdUeSet.e
nd (); |
1176 double metricMax = 0.0; | 1173 double metricMax = 0.0; |
1177 for (it = tdUeSet.begin (); it != tdUeSet.end (); it++) | 1174 for (std::map <uint16_t, pssFlowPerf_t>::iterator it = tdUeSet
.begin (); it != tdUeSet.end (); it++) |
1178 { | 1175 { |
1179 if ((m_ffrSapProvider->IsDlRbgAvailableForUe (i, (*it).fir
st)) == false) | 1176 if ((m_ffrSapProvider->IsDlRbgAvailableForUe (i, (*it).fir
st)) == false) |
1180 continue; | 1177 continue; |
1181 | 1178 |
1182 // calculate PF weigth· | 1179 // calculate PF weigth· |
1183 double weight = (*it).second.targetThroughput / (*it).seco
nd.lastAveragedThroughput; | 1180 double weight = (*it).second.targetThroughput / (*it).seco
nd.lastAveragedThroughput; |
1184 if (weight < 1.0) | 1181 if (weight < 1.0) |
1185 weight = 1.0; | 1182 weight = 1.0; |
1186 ········ | 1183 ········ |
1187 std::map < uint16_t, uint8_t>::iterator itSbCqiSum; | 1184 std::map < uint16_t, uint8_t>::iterator itSbCqiSum; |
(...skipping 59 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1247 itMax = it; | 1244 itMax = it; |
1248 } | 1245 } |
1249 } // end of tdUeSet | 1246 } // end of tdUeSet |
1250 | 1247 |
1251 if (itMax == tdUeSet.end ()) | 1248 if (itMax == tdUeSet.end ()) |
1252 { | 1249 { |
1253 // no UE available for downlink | 1250 // no UE available for downlink |
1254 } | 1251 } |
1255 else | 1252 else |
1256 { | 1253 { |
1257 allocationMap[(*itMax).first].push_back (static_cast<uint1
6_t>(i)); | 1254 allocationMap[(*itMax).first].push_back (i); |
1258 rbgMap.at (i) = true; | 1255 rbgMap.at (i) = true; |
1259 } | 1256 } |
1260 }// end of rbgNum | 1257 }// end of rbgNum |
1261 ········ | 1258 ········ |
1262 }// end of CoIta | 1259 }// end of CoIta |
1263 ········ | 1260 ········ |
1264 ········ | 1261 ········ |
1265 if ( m_fdSchedulerType.compare("PFsch") == 0) | 1262 if ( m_fdSchedulerType.compare("PFsch") == 0) |
1266 { | 1263 { |
1267 // FD scheduler: Proportional Fair scheduled (PFsch) | 1264 // FD scheduler: Proportional Fair scheduled (PFsch) |
1268 for (int i = 0; i < rbgNum; i++) | 1265 for (uint8_t i = 0; i < rbgNum; i++) |
1269 { | 1266 { |
1270 if (rbgMap.at (i) == true) | 1267 if (rbgMap.at (i) == true) |
1271 continue; | 1268 continue; |
1272 | 1269 |
1273 std::map <uint16_t, pssFlowPerf_t>::iterator itMax = tdUeSet.e
nd (); | 1270 std::map <uint16_t, pssFlowPerf_t>::iterator itMax = tdUeSet.e
nd (); |
1274 double metricMax = 0.0; | 1271 double metricMax = 0.0; |
1275 for (it = tdUeSet.begin (); it != tdUeSet.end (); it++) | 1272 for (std::map <uint16_t, pssFlowPerf_t>::iterator it = tdUeSet
.begin (); it != tdUeSet.end (); it++) |
1276 { | 1273 { |
1277 if ((m_ffrSapProvider->IsDlRbgAvailableForUe (i, (*it).fir
st)) == false) | 1274 if ((m_ffrSapProvider->IsDlRbgAvailableForUe (i, (*it).fir
st)) == false) |
1278 continue; | 1275 continue; |
1279 // calculate PF weigth· | 1276 // calculate PF weigth· |
1280 double weight = (*it).second.targetThroughput / (*it).seco
nd.lastAveragedThroughput; | 1277 double weight = (*it).second.targetThroughput / (*it).seco
nd.lastAveragedThroughput; |
1281 if (weight < 1.0) | 1278 if (weight < 1.0) |
1282 weight = 1.0; | 1279 weight = 1.0; |
1283 ········ | 1280 ········ |
1284 std::map <uint16_t,SbMeasResult_s>::iterator itCqi; | 1281 std::map <uint16_t,SbMeasResult_s>::iterator itCqi; |
1285 itCqi = m_a30CqiRxed.find ((*it).first); | 1282 itCqi = m_a30CqiRxed.find ((*it).first); |
(...skipping 26 matching lines...) Expand all Loading... |
1312 ················ | 1309 ················ |
1313 double schMetric = 0.0; | 1310 double schMetric = 0.0; |
1314 if ((cqi1 > 0)||(cqi2 > 0)) // CQI == 0 means "out of rang
e" (see table 7.2.3-1 of 36.213) | 1311 if ((cqi1 > 0)||(cqi2 > 0)) // CQI == 0 means "out of rang
e" (see table 7.2.3-1 of 36.213) |
1315 { | 1312 { |
1316 double achievableRate = 0.0; | 1313 double achievableRate = 0.0; |
1317 for (uint8_t k = 0; k < nLayer; k++)· | 1314 for (uint8_t k = 0; k < nLayer; k++)· |
1318 { | 1315 { |
1319 uint8_t mcs = 0; | 1316 uint8_t mcs = 0; |
1320 if (sbCqis.size () > k) | 1317 if (sbCqis.size () > k) |
1321 {······················· | 1318 {······················· |
1322 mcs = static_cast<uint8_t>(m_amc->GetMcsFromCq
i (sbCqis.at (k))); | 1319 mcs = m_amc->GetMcsFromCqi (sbCqis.at (k)); |
1323 } | 1320 } |
1324 else | 1321 else |
1325 { | 1322 { |
1326 // no info on this subband -> worst MCS | 1323 // no info on this subband -> worst MCS |
1327 mcs = 0; | 1324 mcs = 0; |
1328 } | 1325 } |
1329 achievableRate += ((m_amc->GetTbSizeFromMcs (mcs,
rbgSize) / 8) / 0.001); // = TB size / TTI | 1326 achievableRate += ((m_amc->GetDlTbSizeFromMcs (mcs
, rbgSize) / 8) / 0.001); // = TB size / TTI |
1330 } | 1327 } |
1331 schMetric = achievableRate / (*it).second.secondLastAv
eragedThroughput; | 1328 schMetric = achievableRate / (*it).second.secondLastAv
eragedThroughput; |
1332 } // end if cqi | 1329 } // end if cqi |
1333 ········· | 1330 ········· |
1334 double metric = 0.0; | 1331 double metric = 0.0; |
1335 metric= weight * schMetric; | 1332 metric= weight * schMetric; |
1336 ········· | 1333 ········· |
1337 if (metric > metricMax ) | 1334 if (metric > metricMax ) |
1338 { | 1335 { |
1339 metricMax = metric; | 1336 metricMax = metric; |
1340 itMax = it; | 1337 itMax = it; |
1341 } | 1338 } |
1342 } // end of tdUeSet | 1339 } // end of tdUeSet |
1343 | 1340 |
1344 if (itMax == tdUeSet.end ()) | 1341 if (itMax == tdUeSet.end ()) |
1345 { | 1342 { |
1346 // no UE available for downlink· | 1343 // no UE available for downlink· |
1347 } | 1344 } |
1348 else | 1345 else |
1349 { | 1346 { |
1350 allocationMap[(*itMax).first].push_back (static_cast<uint1
6_t>(i)); | 1347 allocationMap[(*itMax).first].push_back (i); |
1351 rbgMap.at (i) = true; | 1348 rbgMap.at (i) = true; |
1352 } | 1349 } |
1353 ········· | 1350 ········· |
1354 }// end of rbgNum | 1351 }// end of rbgNum |
1355 ········ | 1352 ········ |
1356 } // end of PFsch | 1353 } // end of PFsch |
1357 | 1354 |
1358 } // end if ueSet1 || ueSet2 | 1355 } // end if ueSet1 || ueSet2 |
1359 ···· | 1356 ···· |
1360 } // end if ueSet | 1357 } // end if ueSet |
(...skipping 77 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1438 worstCqi.at (j) = 1; // try with lowest MCS in RBG with no info on
channel | 1435 worstCqi.at (j) = 1; // try with lowest MCS in RBG with no info on
channel |
1439 } | 1436 } |
1440 } | 1437 } |
1441 for (uint8_t j = 0; j < nLayer; j++) | 1438 for (uint8_t j = 0; j < nLayer; j++) |
1442 { | 1439 { |
1443 NS_LOG_INFO (this << " Layer " << (uint16_t)j << " CQI selected " << (
uint16_t)worstCqi.at (j)); | 1440 NS_LOG_INFO (this << " Layer " << (uint16_t)j << " CQI selected " << (
uint16_t)worstCqi.at (j)); |
1444 } | 1441 } |
1445 uint32_t bytesTxed = 0; | 1442 uint32_t bytesTxed = 0; |
1446 for (uint8_t j = 0; j < nLayer; j++) | 1443 for (uint8_t j = 0; j < nLayer; j++) |
1447 { | 1444 { |
1448 newDci.m_mcs.push_back (static_cast<uint8_t>(m_amc->GetMcsFromCqi (wor
stCqi.at (j)))); | 1445 newDci.m_mcs.push_back (m_amc->GetMcsFromCqi (worstCqi.at (j))); |
1449 int tbSize = (m_amc->GetTbSizeFromMcs (newDci.m_mcs.at (j), RgbPerRnti
* rbgSize) / 8); // (size of TB in bytes according to table 7.1.7.2.1-1 of 36.2
13) | 1446 int tbSize = (m_amc->GetDlTbSizeFromMcs (newDci.m_mcs.at (j), RgbPerRn
ti * rbgSize) / 8); // (size of TB in bytes according to table 7.1.7.2.1-1 of 36
.213) |
1450 newDci.m_tbsSize.push_back (static_cast<uint16_t>(tbSize)); | 1447 newDci.m_tbsSize.push_back (static_cast<uint16_t>(tbSize)); |
1451 NS_LOG_INFO (this << " Layer " << (uint16_t)j << " MCS selected" << m_
amc->GetMcsFromCqi (worstCqi.at (j))); | 1448 NS_LOG_INFO (this << " Layer " << (uint16_t)j << " MCS selected" << m_
amc->GetMcsFromCqi (worstCqi.at (j))); |
1452 bytesTxed += tbSize; | 1449 bytesTxed += tbSize; |
1453 } | 1450 } |
1454 | 1451 |
1455 newDci.m_resAlloc = 0; // only allocation type 0 at this stage | 1452 newDci.m_resAlloc = 0; // only allocation type 0 at this stage |
1456 newDci.m_rbBitmap = 0; // TBD (32 bit bitmap see 7.1.6 of 36.213) | 1453 newDci.m_rbBitmap = 0; // TBD (32 bit bitmap see 7.1.6 of 36.213) |
1457 uint32_t rbgMask = 0; | 1454 uint32_t rbgMask = 0; |
1458 for (uint16_t k = 0; k < (*itMap).second.size (); k++) | 1455 for (uint16_t k = 0; k < (*itMap).second.size (); k++) |
1459 { | 1456 { |
(...skipping 63 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1523 { | 1520 { |
1524 NS_FATAL_ERROR ("Unable to find HARQ timer for RNTI " << (uint16_t
)newEl.m_rnti); | 1521 NS_FATAL_ERROR ("Unable to find HARQ timer for RNTI " << (uint16_t
)newEl.m_rnti); |
1525 } | 1522 } |
1526 (*itHarqTimer).second.at (newDci.m_harqProcess) = 0; | 1523 (*itHarqTimer).second.at (newDci.m_harqProcess) = 0; |
1527 } | 1524 } |
1528 | 1525 |
1529 // ...more parameters -> ingored in this version | 1526 // ...more parameters -> ingored in this version |
1530 | 1527 |
1531 ret.m_buildDataList.push_back (newEl); | 1528 ret.m_buildDataList.push_back (newEl); |
1532 // update UE stats | 1529 // update UE stats |
1533 std::map <uint16_t, pssFlowPerf_t>::iterator it1; | 1530 std::map <uint16_t, pssFlowPerf_t>::iterator it; |
1534 it1 = m_flowStatsDl.find ((*itMap).first); | 1531 it = m_flowStatsDl.find ((*itMap).first); |
1535 if (it1 != m_flowStatsDl.end ()) | 1532 if (it != m_flowStatsDl.end ()) |
1536 { | 1533 { |
1537 (*it1).second.lastTtiBytesTransmitted = bytesTxed; | 1534 (*it).second.lastTtiBytesTransmitted = bytesTxed; |
1538 NS_LOG_INFO (this << " UE total bytes txed " << (*it1).second.lastTtiB
ytesTransmitted); | 1535 NS_LOG_INFO (this << " UE total bytes txed " << (*it).second.lastTtiBy
tesTransmitted); |
1539 } | 1536 } |
1540 else | 1537 else |
1541 { | 1538 { |
1542 NS_FATAL_ERROR (this << " No Stats for this allocated UE"); | 1539 NS_FATAL_ERROR (this << " No Stats for this allocated UE"); |
1543 } | 1540 } |
1544 | 1541 |
1545 itMap++; | 1542 itMap++; |
1546 } // end while allocation | 1543 } // end while allocation |
1547 ret.m_nrOfPdcchOfdmSymbols = 1; /// \todo check correct value according the
DCIs txed | 1544 ret.m_nrOfPdcchOfdmSymbols = 1; /// \todo check correct value according the
DCIs txed |
1548 | 1545 |
(...skipping 272 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1821 | 1818 |
1822 | 1819 |
1823 // Divide the remaining resources equally among the active users starting from
the subsequent one served last scheduling trigger | 1820 // Divide the remaining resources equally among the active users starting from
the subsequent one served last scheduling trigger |
1824 uint16_t tempRbPerFlow = static_cast<uint16_t>((ffrUlBandwidth) / (nflows + rn
tiAllocated.size ())); | 1821 uint16_t tempRbPerFlow = static_cast<uint16_t>((ffrUlBandwidth) / (nflows + rn
tiAllocated.size ())); |
1825 uint16_t rbPerFlow = (minContinuousUlBandwidth < tempRbPerFlow) ? minContinuou
sUlBandwidth : tempRbPerFlow; | 1822 uint16_t rbPerFlow = (minContinuousUlBandwidth < tempRbPerFlow) ? minContinuou
sUlBandwidth : tempRbPerFlow; |
1826 | 1823 |
1827 if (rbPerFlow < 3) | 1824 if (rbPerFlow < 3) |
1828 { | 1825 { |
1829 rbPerFlow = 3; // at least 3 rbg per flow (till available resource) to en
sure TxOpportunity >= 7 bytes | 1826 rbPerFlow = 3; // at least 3 rbg per flow (till available resource) to en
sure TxOpportunity >= 7 bytes |
1830 } | 1827 } |
1831 int rbAllocated = 0; | 1828 uint16_t rbAllocated = 0; |
1832 | 1829 |
1833 std::map <uint16_t, pssFlowPerf_t>::iterator itStats; | 1830 std::map <uint16_t, pssFlowPerf_t>::iterator itStats; |
1834 if (m_nextRntiUl != 0) | 1831 if (m_nextRntiUl != 0) |
1835 { | 1832 { |
1836 for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++) | 1833 for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++) |
1837 { | 1834 { |
1838 if ((*it).first == m_nextRntiUl) | 1835 if ((*it).first == m_nextRntiUl) |
1839 { | 1836 { |
1840 break; | 1837 break; |
1841 } | 1838 } |
(...skipping 19 matching lines...) Expand all Loading... |
1861 if (it == m_ceBsrRxed.end ()) | 1858 if (it == m_ceBsrRxed.end ()) |
1862 { | 1859 { |
1863 // restart from the first | 1860 // restart from the first |
1864 it = m_ceBsrRxed.begin (); | 1861 it = m_ceBsrRxed.begin (); |
1865 } | 1862 } |
1866 continue; | 1863 continue; |
1867 } | 1864 } |
1868 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) | 1865 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) |
1869 { | 1866 { |
1870 // limit to physical resources last resource assignment | 1867 // limit to physical resources last resource assignment |
1871 rbPerFlow = static_cast<uint16_t>(m_cschedCellConfig.m_ulBandwidth - r
bAllocated); | 1868 rbPerFlow = m_cschedCellConfig.m_ulBandwidth - rbAllocated; |
1872 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes | 1869 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes |
1873 if (rbPerFlow < 3) | 1870 if (rbPerFlow < 3) |
1874 { | 1871 { |
1875 // terminate allocation | 1872 // terminate allocation |
1876 rbPerFlow = 0;······ | 1873 rbPerFlow = 0;······ |
1877 } | 1874 } |
1878 } | 1875 } |
1879 | 1876 |
1880 rbAllocated = 0; | 1877 rbAllocated = 0; |
1881 UlDciListElement_s uldci; | 1878 UlDciListElement_s uldci; |
1882 uldci.m_rnti = (*it).first; | 1879 uldci.m_rnti = (*it).first; |
1883 uldci.m_rbLen = static_cast<uint8_t>(rbPerFlow); | 1880 uldci.m_rbLen = static_cast<uint8_t>(rbPerFlow); |
1884 uldci.m_rbStart = 0; | 1881 uldci.m_rbStart = 0; |
1885 bool allocated = false; | 1882 bool allocated = false; |
1886 NS_LOG_INFO (this << " RB Allocated " << rbAllocated << " rbPerFlow " << r
bPerFlow << " flows " << nflows); | 1883 NS_LOG_INFO (this << " RB Allocated " << rbAllocated << " rbPerFlow " << r
bPerFlow << " flows " << nflows); |
1887 while ((!allocated)&&((rbAllocated + rbPerFlow - m_cschedCellConfig.m_ulBa
ndwidth) < 1) && (rbPerFlow != 0)) | 1884 while ((!allocated)&&((rbAllocated + rbPerFlow - m_cschedCellConfig.m_ulBa
ndwidth) < 1) && (rbPerFlow != 0)) |
1888 { | 1885 { |
1889 // check availability | 1886 // check availability |
1890 bool free = true; | 1887 bool free = true; |
1891 for (uint16_t j = static_cast<uint16_t>(rbAllocated); j < static_cast<
uint16_t>(rbAllocated + rbPerFlow); j++) | 1888 for (uint16_t j = rbAllocated; j < rbAllocated + rbPerFlow; j++) |
1892 { | 1889 { |
1893 if (rbMap.at (j) == true) | 1890 if (rbMap.at (j) == true) |
1894 { | 1891 { |
1895 free = false; | 1892 free = false; |
1896 break; | 1893 break; |
1897 } | 1894 } |
1898 if ((m_ffrSapProvider->IsUlRbgAvailableForUe (j, (*it).first)) ==
false) | 1895 if ((m_ffrSapProvider->IsUlRbgAvailableForUe (j, (*it).first)) ==
false) |
1899 { | 1896 { |
1900 free = false; | 1897 free = false; |
1901 break; | 1898 break; |
1902 } | 1899 } |
1903 } | 1900 } |
1904 if (free) | 1901 if (free) |
1905 { | 1902 { |
1906 NS_LOG_INFO (this << "RNTI: "<< (*it).first<< " RB Allocated "
<< rbAllocated << " rbPerFlow " << rbPerFlow << " flows " << nflows); | 1903 NS_LOG_INFO (this << "RNTI: "<< (*it).first<< " RB Allocated "
<< rbAllocated << " rbPerFlow " << rbPerFlow << " flows " << nflows); |
1907 uldci.m_rbStart = static_cast<uint8_t>(rbAllocated); | 1904 uldci.m_rbStart = static_cast<uint8_t>(rbAllocated); |
1908 | 1905 |
1909 for (uint16_t j = static_cast<uint16_t>(rbAllocated); j < static_c
ast<uint16_t>(rbAllocated + rbPerFlow); j++) | 1906 for (uint16_t j = rbAllocated; j < rbAllocated + rbPerFlow; j++) |
1910 { | 1907 { |
1911 rbMap.at (j) = true; | 1908 rbMap.at (j) = true; |
1912 // store info on allocation for managing ul-cqi interpretation | 1909 // store info on allocation for managing ul-cqi interpretation |
1913 rbgAllocationMap.at (j) = (*it).first; | 1910 rbgAllocationMap.at (j) = (*it).first; |
1914 } | 1911 } |
1915 rbAllocated += rbPerFlow; | 1912 rbAllocated += rbPerFlow; |
1916 allocated = true; | 1913 allocated = true; |
1917 break; | 1914 break; |
1918 } | 1915 } |
1919 rbAllocated++; | 1916 rbAllocated++; |
1920 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) | 1917 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) |
1921 { | 1918 { |
1922 // limit to physical resources last resource assignment | 1919 // limit to physical resources last resource assignment |
1923 rbPerFlow = static_cast<uint16_t>(m_cschedCellConfig.m_ulBandwidth
- rbAllocated); | 1920 rbPerFlow = m_cschedCellConfig.m_ulBandwidth - rbAllocated; |
1924 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes | 1921 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes |
1925 if (rbPerFlow < 3) | 1922 if (rbPerFlow < 3) |
1926 { | 1923 { |
1927 // terminate allocation | 1924 // terminate allocation |
1928 rbPerFlow = 0;················· | 1925 rbPerFlow = 0;················· |
1929 } | 1926 } |
1930 } | 1927 } |
1931 } | 1928 } |
1932 if (!allocated) | 1929 if (!allocated) |
1933 { | 1930 { |
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1986 it = m_ceBsrRxed.begin (); | 1983 it = m_ceBsrRxed.begin (); |
1987 } | 1984 } |
1988 NS_LOG_DEBUG (this << " UE discared for CQI=0, RNTI " << uldci.m_r
nti); | 1985 NS_LOG_DEBUG (this << " UE discared for CQI=0, RNTI " << uldci.m_r
nti); |
1989 // remove UE from allocation map | 1986 // remove UE from allocation map |
1990 for (uint16_t i = uldci.m_rbStart; i < uldci.m_rbStart + uldci.m_r
bLen; i++) | 1987 for (uint16_t i = uldci.m_rbStart; i < uldci.m_rbStart + uldci.m_r
bLen; i++) |
1991 { | 1988 { |
1992 rbgAllocationMap.at (i) = 0; | 1989 rbgAllocationMap.at (i) = 0; |
1993 } | 1990 } |
1994 continue; // CQI == 0 means "out of range" (see table 7.2.3-1 of 3
6.213) | 1991 continue; // CQI == 0 means "out of range" (see table 7.2.3-1 of 3
6.213) |
1995 } | 1992 } |
1996 uldci.m_mcs = static_cast<uint8_t>(m_amc->GetMcsFromCqi (cqi)); | 1993 uldci.m_mcs = m_amc->GetMcsFromCqi (cqi); |
1997 } | 1994 } |
1998 | 1995 |
1999 uldci.m_tbSize = static_cast<uint16_t>(m_amc->GetTbSizeFromMcs (uldci.m_mc
s, rbPerFlow) / 8); | 1996 uldci.m_tbSize = (m_amc->GetUlTbSizeFromMcs (uldci.m_mcs, rbPerFlow) / 8); |
2000 UpdateUlRlcBufferInfo (uldci.m_rnti, uldci.m_tbSize); | 1997 UpdateUlRlcBufferInfo (uldci.m_rnti, uldci.m_tbSize); |
2001 uldci.m_ndi = 1; | 1998 uldci.m_ndi = 1; |
2002 uldci.m_cceIndex = 0; | 1999 uldci.m_cceIndex = 0; |
2003 uldci.m_aggrLevel = 1; | 2000 uldci.m_aggrLevel = 1; |
2004 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF | 2001 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF |
2005 uldci.m_hopping = false; | 2002 uldci.m_hopping = false; |
2006 uldci.m_n2Dmrs = 0; | 2003 uldci.m_n2Dmrs = 0; |
2007 uldci.m_tpc = 0; // no power control | 2004 uldci.m_tpc = 0; // no power control |
2008 uldci.m_cqiRequest = false; // only period CQI at this stage | 2005 uldci.m_cqiRequest = false; // only period CQI at this stage |
2009 uldci.m_ulIndex = 0; // TDD parameter | 2006 uldci.m_ulIndex = 0; // TDD parameter |
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2433 { | 2430 { |
2434 NS_LOG_FUNCTION (this << " RNTI " << rnti << " txMode " << (uint16_t)txMode); | 2431 NS_LOG_FUNCTION (this << " RNTI " << rnti << " txMode " << (uint16_t)txMode); |
2435 FfMacCschedSapUser::CschedUeConfigUpdateIndParameters params; | 2432 FfMacCschedSapUser::CschedUeConfigUpdateIndParameters params; |
2436 params.m_rnti = rnti; | 2433 params.m_rnti = rnti; |
2437 params.m_transmissionMode = txMode; | 2434 params.m_transmissionMode = txMode; |
2438 m_cschedSapUser->CschedUeConfigUpdateInd (params); | 2435 m_cschedSapUser->CschedUeConfigUpdateInd (params); |
2439 } | 2436 } |
2440 | 2437 |
2441 | 2438 |
2442 } | 2439 } |
LEFT | RIGHT |