LEFT | RIGHT |
1 /* -*- Mode:C++; c-file-style:"gnu"; indent-tabs-mode:nil; -*- */ | 1 /* -*- Mode:C++; c-file-style:"gnu"; indent-tabs-mode:nil; -*- */ |
2 /* | 2 /* |
3 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC) | 3 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC) |
4 * | 4 * |
5 * This program is free software; you can redistribute it and/or modify | 5 * This program is free software; you can redistribute it and/or modify |
6 * it under the terms of the GNU General Public License version 2 as | 6 * it under the terms of the GNU General Public License version 2 as |
7 * published by the Free Software Foundation; | 7 * published by the Free Software Foundation; |
8 * | 8 * |
9 * This program is distributed in the hope that it will be useful, | 9 * This program is distributed in the hope that it will be useful, |
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of | 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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302 } | 302 } |
303 | 303 |
304 return; | 304 return; |
305 } | 305 } |
306 | 306 |
307 void | 307 void |
308 TtaFfMacScheduler::DoSchedDlPagingBufferReq (const struct FfMacSchedSapProvider:
:SchedDlPagingBufferReqParameters& params) | 308 TtaFfMacScheduler::DoSchedDlPagingBufferReq (const struct FfMacSchedSapProvider:
:SchedDlPagingBufferReqParameters& params) |
309 { | 309 { |
310 NS_LOG_FUNCTION (this); | 310 NS_LOG_FUNCTION (this); |
311 NS_FATAL_ERROR ("method not implemented"); | 311 NS_FATAL_ERROR ("method not implemented"); |
312 NS_UNUSED(params); | 312 NS_UNUSED (params); |
313 return; | 313 return; |
314 } | 314 } |
315 | 315 |
316 void | 316 void |
317 TtaFfMacScheduler::DoSchedDlMacBufferReq (const struct FfMacSchedSapProvider::Sc
hedDlMacBufferReqParameters& params) | 317 TtaFfMacScheduler::DoSchedDlMacBufferReq (const struct FfMacSchedSapProvider::Sc
hedDlMacBufferReqParameters& params) |
318 { | 318 { |
319 NS_LOG_FUNCTION (this); | 319 NS_LOG_FUNCTION (this); |
320 NS_FATAL_ERROR ("method not implemented"); | 320 NS_FATAL_ERROR ("method not implemented"); |
321 NS_UNUSED(params); | 321 NS_UNUSED (params); |
322 return; | 322 return; |
323 } | 323 } |
324 | 324 |
325 int | 325 int |
326 TtaFfMacScheduler::GetRbgSize (int dlbandwidth) | 326 TtaFfMacScheduler::GetRbgSize (int dlbandwidth) |
327 { | 327 { |
328 for (int i = 0; i < 4; i++) | 328 for (int i = 0; i < 4; i++) |
329 { | 329 { |
330 if (dlbandwidth < TtaType0AllocationRbg[i]) | 330 if (dlbandwidth < TtaType0AllocationRbg[i]) |
331 { | 331 { |
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483 int rbgSize = GetRbgSize (m_cschedCellConfig.m_dlBandwidth); | 483 int rbgSize = GetRbgSize (m_cschedCellConfig.m_dlBandwidth); |
484 int rbgNum = m_cschedCellConfig.m_dlBandwidth / rbgSize; | 484 int rbgNum = m_cschedCellConfig.m_dlBandwidth / rbgSize; |
485 std::map <uint16_t, std::vector <uint16_t> > allocationMap; // RBs map per RNT
I | 485 std::map <uint16_t, std::vector <uint16_t> > allocationMap; // RBs map per RNT
I |
486 std::vector <bool> rbgMap; // global RBGs map | 486 std::vector <bool> rbgMap; // global RBGs map |
487 uint16_t rbgAllocatedNum = 0; | 487 uint16_t rbgAllocatedNum = 0; |
488 std::set <uint16_t> rntiAllocated; | 488 std::set <uint16_t> rntiAllocated; |
489 rbgMap.resize (m_cschedCellConfig.m_dlBandwidth / rbgSize, false); | 489 rbgMap.resize (m_cschedCellConfig.m_dlBandwidth / rbgSize, false); |
490 FfMacSchedSapUser::SchedDlConfigIndParameters ret; | 490 FfMacSchedSapUser::SchedDlConfigIndParameters ret; |
491 | 491 |
492 // update UL HARQ proc id | 492 // update UL HARQ proc id |
493 std::map <uint16_t, uint8_t>::iterator itProcId; | 493 for (std::map <uint16_t, uint8_t>::iterator itProcId = m_ulHarqCurrentProcessI
d.begin (); itProcId != m_ulHarqCurrentProcessId.end (); itProcId++) |
494 for (itProcId = m_ulHarqCurrentProcessId.begin (); itProcId != m_ulHarqCurrent
ProcessId.end (); itProcId++) | |
495 { | 494 { |
496 (*itProcId).second = ((*itProcId).second + 1) % HARQ_PROC_NUM; | 495 (*itProcId).second = ((*itProcId).second + 1) % HARQ_PROC_NUM; |
497 } | 496 } |
498 | 497 |
499 // RACH Allocation | 498 // RACH Allocation |
500 m_rachAllocationMap.resize (m_cschedCellConfig.m_ulBandwidth, 0); | 499 m_rachAllocationMap.resize (m_cschedCellConfig.m_ulBandwidth, 0); |
501 uint16_t rbStart = 0; | 500 uint8_t rbStart = 0; |
502 std::vector <struct RachListElement_s>::iterator itRach; | 501 std::vector <struct RachListElement_s>::iterator itRach; |
503 for (itRach = m_rachList.begin (); itRach != m_rachList.end (); itRach++) | 502 for (itRach = m_rachList.begin (); itRach != m_rachList.end (); itRach++) |
504 { | 503 { |
505 NS_ASSERT_MSG (m_amc->GetTbSizeFromMcs (m_ulGrantMcs, m_cschedCellConfig.m
_ulBandwidth) > (*itRach).m_estimatedSize, " Default UL Grant MCS does not allow
to send RACH messages"); | 504 NS_ASSERT_MSG (m_amc->GetUlTbSizeFromMcs (m_ulGrantMcs, m_cschedCellConfig
.m_ulBandwidth) > (*itRach).m_estimatedSize, " Default UL Grant MCS does not all
ow to send RACH messages"); |
506 BuildRarListElement_s newRar; | 505 BuildRarListElement_s newRar; |
507 newRar.m_rnti = (*itRach).m_rnti; | 506 newRar.m_rnti = (*itRach).m_rnti; |
508 // DL-RACH Allocation | 507 // DL-RACH Allocation |
509 // Ideal: no needs of configuring m_dci | 508 // Ideal: no needs of configuring m_dci |
510 // UL-RACH Allocation | 509 // UL-RACH Allocation |
511 newRar.m_grant.m_rnti = newRar.m_rnti; | 510 newRar.m_grant.m_rnti = newRar.m_rnti; |
512 newRar.m_grant.m_mcs = m_ulGrantMcs; | 511 newRar.m_grant.m_mcs = m_ulGrantMcs; |
513 uint16_t rbLen = 1; | 512 uint8_t rbLen = 1; |
514 uint16_t tbSizeBits = 0; | 513 uint16_t tbSizeBits = 0; |
515 // find lowest TB size that fits UL grant estimated size | 514 // find lowest TB size that fits UL grant estimated size |
516 while ((tbSizeBits < (*itRach).m_estimatedSize) && (rbStart + rbLen < m_cs
chedCellConfig.m_ulBandwidth)) | 515 while ((tbSizeBits < (*itRach).m_estimatedSize) && (rbStart + rbLen < m_cs
chedCellConfig.m_ulBandwidth)) |
517 { | 516 { |
518 rbLen++; | 517 rbLen++; |
519 tbSizeBits = static_cast<uint16_t>(m_amc->GetTbSizeFromMcs (m_ulGrantM
cs, rbLen)); | 518 tbSizeBits = m_amc->GetUlTbSizeFromMcs (m_ulGrantMcs, rbLen); |
520 } | 519 } |
521 if (tbSizeBits < (*itRach).m_estimatedSize) | 520 if (tbSizeBits < (*itRach).m_estimatedSize) |
522 { | 521 { |
523 // no more allocation space: finish allocation | 522 // no more allocation space: finish allocation |
524 break; | 523 break; |
525 } | 524 } |
526 newRar.m_grant.m_rbStart = static_cast<uint8_t>(rbStart); | 525 newRar.m_grant.m_rbStart = rbStart; |
527 newRar.m_grant.m_rbLen = static_cast<uint8_t>(rbLen); | 526 newRar.m_grant.m_rbLen = rbLen; |
528 newRar.m_grant.m_tbSize = tbSizeBits / 8; | 527 newRar.m_grant.m_tbSize = tbSizeBits / 8; |
529 newRar.m_grant.m_hopping = false; | 528 newRar.m_grant.m_hopping = false; |
530 newRar.m_grant.m_tpc = 0; | 529 newRar.m_grant.m_tpc = 0; |
531 newRar.m_grant.m_cqiRequest = false; | 530 newRar.m_grant.m_cqiRequest = false; |
532 newRar.m_grant.m_ulDelay = false; | 531 newRar.m_grant.m_ulDelay = false; |
533 NS_LOG_INFO (this << " UL grant allocated to RNTI " << (*itRach).m_rnti <<
" rbStart " << rbStart << " rbLen " << rbLen << " MCS " << m_ulGrantMcs << " tb
Size " << newRar.m_grant.m_tbSize); | 532 NS_LOG_INFO (this << " UL grant allocated to RNTI " << (*itRach).m_rnti <<
" rbStart " << rbStart << " rbLen " << rbLen << " MCS " << m_ulGrantMcs << " tb
Size " << newRar.m_grant.m_tbSize); |
534 for (uint16_t i = rbStart; i < rbStart + rbLen; i++) | 533 for (uint16_t i = rbStart; i < rbStart + rbLen; i++) |
535 { | 534 { |
536 m_rachAllocationMap.at (i) = (*itRach).m_rnti; | 535 m_rachAllocationMap.at (i) = (*itRach).m_rnti; |
537 } | 536 } |
538 | 537 |
539 if (m_harqOn == true) | 538 if (m_harqOn == true) |
540 { | 539 { |
541 // generate UL-DCI for HARQ retransmissions | 540 // generate UL-DCI for HARQ retransmissions |
542 UlDciListElement_s uldci; | 541 UlDciListElement_s uldci; |
543 uldci.m_rnti = newRar.m_rnti; | 542 uldci.m_rnti = newRar.m_rnti; |
544 uldci.m_rbLen = static_cast<uint8_t>(rbLen); | 543 uldci.m_rbLen = rbLen; |
545 uldci.m_rbStart = static_cast<uint8_t>(rbStart); | 544 uldci.m_rbStart = rbStart; |
546 uldci.m_mcs = m_ulGrantMcs; | 545 uldci.m_mcs = m_ulGrantMcs; |
547 uldci.m_tbSize = tbSizeBits / 8; | 546 uldci.m_tbSize = tbSizeBits / 8; |
548 uldci.m_ndi = 1; | 547 uldci.m_ndi = 1; |
549 uldci.m_cceIndex = 0; | 548 uldci.m_cceIndex = 0; |
550 uldci.m_aggrLevel = 1; | 549 uldci.m_aggrLevel = 1; |
551 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF | 550 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF |
552 uldci.m_hopping = false; | 551 uldci.m_hopping = false; |
553 uldci.m_n2Dmrs = 0; | 552 uldci.m_n2Dmrs = 0; |
554 uldci.m_tpc = 0; // no power control | 553 uldci.m_tpc = 0; // no power control |
555 uldci.m_cqiRequest = false; // only period CQI at this stage | 554 uldci.m_cqiRequest = false; // only period CQI at this stage |
556 uldci.m_ulIndex = 0; // TDD parameter | 555 uldci.m_ulIndex = 0; // TDD parameter |
557 uldci.m_dai = 1; // TDD parameter | 556 uldci.m_dai = 1; // TDD parameter |
558 uldci.m_freqHopping = 0; | 557 uldci.m_freqHopping = 0; |
559 uldci.m_pdcchPowerOffset = 0; // not used | 558 uldci.m_pdcchPowerOffset = 0; // not used |
560 | 559 |
561 uint8_t harqId = 0; | 560 uint8_t harqId = 0; |
562 std::map <uint16_t, uint8_t>::iterator itProcId1; | 561 std::map <uint16_t, uint8_t>::iterator itProcId; |
563 itProcId1 = m_ulHarqCurrentProcessId.find (uldci.m_rnti); | 562 itProcId = m_ulHarqCurrentProcessId.find (uldci.m_rnti); |
564 if (itProcId1 == m_ulHarqCurrentProcessId.end ()) | 563 if (itProcId == m_ulHarqCurrentProcessId.end ()) |
565 { | 564 { |
566 NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << uldci.m_r
nti); | 565 NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << uldci.m_r
nti); |
567 } | 566 } |
568 harqId = (*itProcId1).second; | 567 harqId = (*itProcId).second; |
569 std::map <uint16_t, UlHarqProcessesDciBuffer_t>::iterator itDci = m_ul
HarqProcessesDciBuffer.find (uldci.m_rnti); | 568 std::map <uint16_t, UlHarqProcessesDciBuffer_t>::iterator itDci = m_ul
HarqProcessesDciBuffer.find (uldci.m_rnti); |
570 if (itDci == m_ulHarqProcessesDciBuffer.end ()) | 569 if (itDci == m_ulHarqProcessesDciBuffer.end ()) |
571 { | 570 { |
572 NS_FATAL_ERROR ("Unable to find RNTI entry in UL DCI HARQ buffer f
or RNTI " << uldci.m_rnti); | 571 NS_FATAL_ERROR ("Unable to find RNTI entry in UL DCI HARQ buffer f
or RNTI " << uldci.m_rnti); |
573 } | 572 } |
574 (*itDci).second.at (harqId) = uldci; | 573 (*itDci).second.at (harqId) = uldci; |
575 } | 574 } |
576 | 575 |
577 rbStart = rbStart + rbLen; | 576 rbStart = rbStart + rbLen; |
578 ret.m_buildRarList.push_back (newRar); | 577 ret.m_buildRarList.push_back (newRar); |
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605 } | 604 } |
606 std::vector <struct DlInfoListElement_s> dlInfoListUntxed; | 605 std::vector <struct DlInfoListElement_s> dlInfoListUntxed; |
607 for (uint16_t i = 0; i < m_dlInfoListBuffered.size (); i++) | 606 for (uint16_t i = 0; i < m_dlInfoListBuffered.size (); i++) |
608 { | 607 { |
609 std::set <uint16_t>::iterator itRnti = rntiAllocated.find (m_dlInfoListBuf
fered.at (i).m_rnti); | 608 std::set <uint16_t>::iterator itRnti = rntiAllocated.find (m_dlInfoListBuf
fered.at (i).m_rnti); |
610 if (itRnti != rntiAllocated.end ()) | 609 if (itRnti != rntiAllocated.end ()) |
611 { | 610 { |
612 // RNTI already allocated for retx | 611 // RNTI already allocated for retx |
613 continue; | 612 continue; |
614 } | 613 } |
615 uint8_t nLayers = static_cast<uint8_t>(m_dlInfoListBuffered.at (i).m_harqS
tatus.size ()); | 614 uint8_t nLayers = static_cast<uint8_t> (m_dlInfoListBuffered.at (i).m_harq
Status.size ()); |
616 std::vector <bool> retx; | 615 std::vector <bool> retx; |
617 NS_LOG_INFO (this << " Processing DLHARQ feedback"); | 616 NS_LOG_INFO (this << " Processing DLHARQ feedback"); |
618 if (nLayers == 1) | 617 if (nLayers == 1) |
619 { | 618 { |
620 retx.push_back (m_dlInfoListBuffered.at (i).m_harqStatus.at (0) == DlI
nfoListElement_s::NACK); | 619 retx.push_back (m_dlInfoListBuffered.at (i).m_harqStatus.at (0) == DlI
nfoListElement_s::NACK); |
621 retx.push_back (false); | 620 retx.push_back (false); |
622 } | 621 } |
623 else | 622 else |
624 { | 623 { |
625 retx.push_back (m_dlInfoListBuffered.at (i).m_harqStatus.at (0) == DlI
nfoListElement_s::NACK); | 624 retx.push_back (m_dlInfoListBuffered.at (i).m_harqStatus.at (0) == DlI
nfoListElement_s::NACK); |
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702 NS_LOG_INFO ("RBG " << dciRbg.at (j) << " assigned"); | 701 NS_LOG_INFO ("RBG " << dciRbg.at (j) << " assigned"); |
703 rbgAllocatedNum++; | 702 rbgAllocatedNum++; |
704 } | 703 } |
705 | 704 |
706 NS_LOG_INFO (this << " Send retx in the same RBGs"); | 705 NS_LOG_INFO (this << " Send retx in the same RBGs"); |
707 } | 706 } |
708 else | 707 else |
709 { | 708 { |
710 // find RBGs for sending HARQ retx | 709 // find RBGs for sending HARQ retx |
711 uint8_t j = 0; | 710 uint8_t j = 0; |
712 uint8_t rbgId = static_cast<uint8_t>((dciRbg.at (dciRbg.size () -
1) + 1) % rbgNum); | 711 uint8_t rbgId = static_cast<uint8_t> ((dciRbg.at (dciRbg.size () -
1) + 1) % rbgNum); |
713 uint8_t startRbg = static_cast<uint8_t>(dciRbg.at (dciRbg.size ()
- 1)); | 712 uint8_t startRbg = static_cast<uint8_t> (dciRbg.at (dciRbg.size ()
- 1)); |
714 std::vector <bool> rbgMapCopy = rbgMap; | 713 std::vector <bool> rbgMapCopy = rbgMap; |
715 while ((j < dciRbg.size ())&&(startRbg != rbgId)) | 714 while ((j < dciRbg.size ())&&(startRbg != rbgId)) |
716 { | 715 { |
717 if (rbgMapCopy.at (rbgId) == false) | 716 if (rbgMapCopy.at (rbgId) == false) |
718 { | 717 { |
719 rbgMapCopy.at (rbgId) = true; | 718 rbgMapCopy.at (rbgId) = true; |
720 dciRbg.at (j) = rbgId; | 719 dciRbg.at (j) = rbgId; |
721 j++; | 720 j++; |
722 } | 721 } |
723 rbgId = (rbgId + 1) % rbgNum; | 722 rbgId = (rbgId + 1) % rbgNum; |
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850 // all the RBGs are already allocated -> exit | 849 // all the RBGs are already allocated -> exit |
851 if ((ret.m_buildDataList.size () > 0) || (ret.m_buildRarList.size () > 0)) | 850 if ((ret.m_buildDataList.size () > 0) || (ret.m_buildRarList.size () > 0)) |
852 { | 851 { |
853 m_schedSapUser->SchedDlConfigInd (ret); | 852 m_schedSapUser->SchedDlConfigInd (ret); |
854 } | 853 } |
855 return; | 854 return; |
856 } | 855 } |
857 | 856 |
858 | 857 |
859 | 858 |
860 for (int i = 0; i < rbgNum; i++) | 859 for (uint16_t i = 0; i < rbgNum; i++) |
861 { | 860 { |
862 NS_LOG_INFO (this << " ALLOCATION for RBG " << i << " of " << rbgNum); | 861 NS_LOG_INFO (this << " ALLOCATION for RBG " << i << " of " << rbgNum); |
863 if (rbgMap.at (i) == false) | 862 if (rbgMap.at (i) == false) |
864 { | 863 { |
865 std::set <uint16_t>::iterator it; | 864 std::set <uint16_t>::iterator it; |
866 std::set <uint16_t>::iterator itMax = m_flowStatsDl.end (); | 865 std::set <uint16_t>::iterator itMax = m_flowStatsDl.end (); |
867 double rcqiMax = 0.0; | 866 double rcqiMax = 0.0; |
868 for (it = m_flowStatsDl.begin (); it != m_flowStatsDl.end (); it++) | 867 for (it = m_flowStatsDl.begin (); it != m_flowStatsDl.end (); it++) |
869 { | 868 { |
870 std::set <uint16_t>::iterator itRnti = rntiAllocated.find ((*it)); | 869 std::set <uint16_t>::iterator itRnti = rntiAllocated.find ((*it)); |
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930 { | 929 { |
931 // this UE has data to transmit | 930 // this UE has data to transmit |
932 double achievableSbRate = 0.0; | 931 double achievableSbRate = 0.0; |
933 double achievableWbRate = 0.0; | 932 double achievableWbRate = 0.0; |
934 uint8_t sbMcs = 0; | 933 uint8_t sbMcs = 0; |
935 uint8_t wbMcs = 0;· | 934 uint8_t wbMcs = 0;· |
936 for (uint8_t k = 0; k < nLayer; k++) | 935 for (uint8_t k = 0; k < nLayer; k++) |
937 { | 936 { |
938 if (sbCqi.size () > k) | 937 if (sbCqi.size () > k) |
939 { | 938 { |
940 sbMcs = static_cast<uint8_t>(m_amc->GetMcsFromCqi
(sbCqi.at (k))); | 939 sbMcs = m_amc->GetMcsFromCqi (sbCqi.at (k)); |
941 } | 940 } |
942 else | 941 else |
943 { | 942 { |
944 // no info on this subband -> worst MCS | 943 // no info on this subband -> worst MCS |
945 sbMcs = 0; | 944 sbMcs = 0; |
946 } | 945 } |
947 achievableSbRate += ((m_amc->GetTbSizeFromMcs (sbMcs,
rbgSize) / 8) / 0.001); // = TB size / TTI | 946 achievableSbRate += ((m_amc->GetDlTbSizeFromMcs (sbMcs
, rbgSize) / 8) / 0.001); // = TB size / TTI |
948 wbMcs = static_cast<uint8_t>(m_amc->GetMcsFromCqi (wbC
qi)); | 947 wbMcs = m_amc->GetMcsFromCqi (wbCqi); |
949 achievableWbRate += ((m_amc->GetTbSizeFromMcs (wbMcs,
rbgSize) / 8) / 0.001); // = TB size / TTI | 948 achievableWbRate += ((m_amc->GetDlTbSizeFromMcs (wbMcs
, rbgSize) / 8) / 0.001); // = TB size / TTI |
950 } | 949 } |
951 | 950 |
952 double metric = achievableSbRate / achievableWbRate; | 951 double metric = achievableSbRate / achievableWbRate; |
953 | 952 |
954 if (metric > rcqiMax) | 953 if (metric > rcqiMax) |
955 { | 954 { |
956 rcqiMax = metric; | 955 rcqiMax = metric; |
957 itMax = it; | 956 itMax = it; |
958 } | 957 } |
959 } | 958 } |
960 } // end if cqi | 959 } // end if cqi |
961 ·············· | 960 ·············· |
962 } // end for m_rlcBufferReq | 961 } // end for m_rlcBufferReq |
963 | 962 |
964 if (itMax == m_flowStatsDl.end ()) | 963 if (itMax == m_flowStatsDl.end ()) |
965 { | 964 { |
966 // no UE available for this RB | 965 // no UE available for this RB |
967 NS_LOG_INFO (this << " any UE found"); | 966 NS_LOG_INFO (this << " any UE found"); |
968 } | 967 } |
969 else | 968 else |
970 { | 969 { |
971 rbgMap.at (i) = true; | 970 rbgMap.at (i) = true; |
972 std::map <uint16_t, std::vector <uint16_t> >::iterator itMap; | 971 std::map <uint16_t, std::vector <uint16_t> >::iterator itMap; |
973 itMap = allocationMap.find ((*itMax)); | 972 itMap = allocationMap.find ((*itMax)); |
974 if (itMap == allocationMap.end ()) | 973 if (itMap == allocationMap.end ()) |
975 { | 974 { |
976 // insert new element | 975 // insert new element |
977 std::vector <uint16_t> tempMap; | 976 std::vector <uint16_t> tempMap; |
978 tempMap.push_back (static_cast<uint16_t>(i)); | 977 tempMap.push_back (i); |
979 allocationMap.insert (std::pair <uint16_t, std::vector <uint16
_t> > ((*itMax), tempMap)); | 978 allocationMap.insert (std::pair <uint16_t, std::vector <uint16
_t> > ((*itMax), tempMap)); |
980 } | 979 } |
981 else | 980 else |
982 { | 981 { |
983 (*itMap).second.push_back (static_cast<uint16_t>(i)); | 982 (*itMap).second.push_back (i); |
984 } | 983 } |
985 NS_LOG_INFO (this << " UE assigned " << (*itMax)); | 984 NS_LOG_INFO (this << " UE assigned " << (*itMax)); |
986 } | 985 } |
987 } // end for RBG free | 986 } // end for RBG free |
988 } // end for RBGs | 987 } // end for RBGs |
989 | 988 |
990 // generate the transmission opportunities by grouping the RBGs of the same RN
TI and | 989 // generate the transmission opportunities by grouping the RBGs of the same RN
TI and |
991 // creating the correspondent DCIs | 990 // creating the correspondent DCIs |
992 std::map <uint16_t, std::vector <uint16_t> >::iterator itMap = allocationMap.b
egin (); | 991 std::map <uint16_t, std::vector <uint16_t> >::iterator itMap = allocationMap.b
egin (); |
993 while (itMap != allocationMap.end ()) | 992 while (itMap != allocationMap.end ()) |
994 { | 993 { |
995 // create new BuildDataListElement_s for this LC | 994 // create new BuildDataListElement_s for this LC |
996 BuildDataListElement_s newEl; | 995 BuildDataListElement_s newEl; |
997 newEl.m_rnti = (*itMap).first; | 996 newEl.m_rnti = (*itMap).first; |
998 // create the DlDciListElement_s | 997 // create the DlDciListElement_s |
999 DlDciListElement_s newDci; | 998 DlDciListElement_s newDci; |
1000 newDci.m_rnti = (*itMap).first; | 999 newDci.m_rnti = (*itMap).first; |
1001 newDci.m_harqProcess = UpdateHarqProcessId ((*itMap).first); | 1000 newDci.m_harqProcess = UpdateHarqProcessId ((*itMap).first); |
1002 | 1001 |
1003 uint16_t lcActives = static_cast<uint16_t>(LcActivePerFlow ((*itMap).first
)); | 1002 uint16_t lcActives = static_cast<uint16_t> (LcActivePerFlow ((*itMap).firs
t)); |
1004 NS_LOG_INFO (this << "Allocate user " << newEl.m_rnti << " rbg " << lcActi
ves); | 1003 NS_LOG_INFO (this << "Allocate user " << newEl.m_rnti << " rbg " << lcActi
ves); |
1005 if (lcActives == 0) | 1004 if (lcActives == 0) |
1006 { | 1005 { |
1007 // Set to max value, to avoid divide by 0 below | 1006 // Set to max value, to avoid divide by 0 below |
1008 lcActives = (uint16_t)65535; // UINT16_MAX; | 1007 lcActives = (uint16_t)65535; // UINT16_MAX; |
1009 } | 1008 } |
1010 uint16_t RgbPerRnti = static_cast<uint16_t>((*itMap).second.size ()); | 1009 uint16_t RgbPerRnti = static_cast<uint16_t> ((*itMap).second.size ()); |
1011 std::map <uint16_t,SbMeasResult_s>::iterator itCqi; | 1010 std::map <uint16_t,SbMeasResult_s>::iterator itCqi; |
1012 itCqi = m_a30CqiRxed.find ((*itMap).first); | 1011 itCqi = m_a30CqiRxed.find ((*itMap).first); |
1013 std::map <uint16_t,uint8_t>::iterator itTxMode; | 1012 std::map <uint16_t,uint8_t>::iterator itTxMode; |
1014 itTxMode = m_uesTxMode.find ((*itMap).first); | 1013 itTxMode = m_uesTxMode.find ((*itMap).first); |
1015 if (itTxMode == m_uesTxMode.end ()) | 1014 if (itTxMode == m_uesTxMode.end ()) |
1016 { | 1015 { |
1017 NS_FATAL_ERROR ("No Transmission Mode info on user " << (*itMap).first
); | 1016 NS_FATAL_ERROR ("No Transmission Mode info on user " << (*itMap).first
); |
1018 } | 1017 } |
1019 int nLayer = TransmissionModesLayers::TxMode2LayerNum ((*itTxMode).second)
; | 1018 int nLayer = TransmissionModesLayers::TxMode2LayerNum ((*itTxMode).second)
; |
1020 std::vector <uint8_t> worstCqi (2, 15); | 1019 std::vector <uint8_t> worstCqi (2, 15); |
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1057 worstCqi.at (j) = 1; // try with lowest MCS in RBG with no info on
channel | 1056 worstCqi.at (j) = 1; // try with lowest MCS in RBG with no info on
channel |
1058 } | 1057 } |
1059 } | 1058 } |
1060 for (uint8_t j = 0; j < nLayer; j++) | 1059 for (uint8_t j = 0; j < nLayer; j++) |
1061 { | 1060 { |
1062 NS_LOG_INFO (this << " Layer " << (uint16_t)j << " CQI selected " << (
uint16_t)worstCqi.at (j)); | 1061 NS_LOG_INFO (this << " Layer " << (uint16_t)j << " CQI selected " << (
uint16_t)worstCqi.at (j)); |
1063 } | 1062 } |
1064 uint32_t bytesTxed = 0; | 1063 uint32_t bytesTxed = 0; |
1065 for (uint8_t j = 0; j < nLayer; j++) | 1064 for (uint8_t j = 0; j < nLayer; j++) |
1066 { | 1065 { |
1067 newDci.m_mcs.push_back (static_cast<uint8_t>(m_amc->GetMcsFromCqi (wor
stCqi.at (j)))); | 1066 newDci.m_mcs.push_back (m_amc->GetMcsFromCqi (worstCqi.at (j))); |
1068 int tbSize = (m_amc->GetTbSizeFromMcs (newDci.m_mcs.at (j), RgbPerRnti
* rbgSize) / 8); // (size of TB in bytes according to table 7.1.7.2.1-1 of 36.2
13) | 1067 int tbSize = (m_amc->GetDlTbSizeFromMcs (newDci.m_mcs.at (j), RgbPerRn
ti * rbgSize) / 8); // (size of TB in bytes according to table 7.1.7.2.1-1 of 36
.213) |
1069 newDci.m_tbsSize.push_back (static_cast<uint16_t>(tbSize)); | 1068 newDci.m_tbsSize.push_back (static_cast<uint16_t> (tbSize)); |
1070 NS_LOG_INFO (this << " Layer " << (uint16_t)j << " MCS selected" << m_
amc->GetMcsFromCqi (worstCqi.at (j))); | 1069 NS_LOG_INFO (this << " Layer " << (uint16_t)j << " MCS selected" << m_
amc->GetMcsFromCqi (worstCqi.at (j))); |
1071 | 1070 |
1072 bytesTxed += tbSize; | 1071 bytesTxed += tbSize; |
1073 } | 1072 } |
1074 | 1073 |
1075 newDci.m_resAlloc = 0; // only allocation type 0 at this stage | 1074 newDci.m_resAlloc = 0; // only allocation type 0 at this stage |
1076 newDci.m_rbBitmap = 0; // TBD (32 bit bitmap see 7.1.6 of 36.213) | 1075 newDci.m_rbBitmap = 0; // TBD (32 bit bitmap see 7.1.6 of 36.213) |
1077 uint32_t rbgMask = 0; | 1076 uint32_t rbgMask = 0; |
1078 for (uint16_t k = 0; k < (*itMap).second.size (); k++) | 1077 for (uint16_t k = 0; k < (*itMap).second.size (); k++) |
1079 { | 1078 { |
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1386 { | 1385 { |
1387 m_allocationMaps.insert (std::pair <uint16_t, std::vector <uint16_t> >
(params.m_sfnSf, rbgAllocationMap)); | 1386 m_allocationMaps.insert (std::pair <uint16_t, std::vector <uint16_t> >
(params.m_sfnSf, rbgAllocationMap)); |
1388 m_schedSapUser->SchedUlConfigInd (ret); | 1387 m_schedSapUser->SchedUlConfigInd (ret); |
1389 } | 1388 } |
1390 ········ | 1389 ········ |
1391 return; // no flows to be scheduled | 1390 return; // no flows to be scheduled |
1392 } | 1391 } |
1393 | 1392 |
1394 | 1393 |
1395 // Divide the remaining resources equally among the active users starting from
the subsequent one served last scheduling trigger | 1394 // Divide the remaining resources equally among the active users starting from
the subsequent one served last scheduling trigger |
1396 uint16_t rbPerFlow = static_cast<uint16_t>((m_cschedCellConfig.m_ulBandwidth /
(nflows + rntiAllocated.size ()))); | 1395 uint16_t rbPerFlow = static_cast<uint16_t> ((m_cschedCellConfig.m_ulBandwidth
/ (nflows + rntiAllocated.size ()))); |
1397 if (rbPerFlow < 3) | 1396 if (rbPerFlow < 3) |
1398 { | 1397 { |
1399 rbPerFlow = 3; // at least 3 rbg per flow (till available resource) to en
sure TxOpportunity >= 7 bytes | 1398 rbPerFlow = 3; // at least 3 rbg per flow (till available resource) to en
sure TxOpportunity >= 7 bytes |
1400 } | 1399 } |
1401 int rbAllocated = 0; | 1400 uint16_t rbAllocated = 0; |
1402 | 1401 |
1403 if (m_nextRntiUl != 0) | 1402 if (m_nextRntiUl != 0) |
1404 { | 1403 { |
1405 for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++) | 1404 for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++) |
1406 { | 1405 { |
1407 if ((*it).first == m_nextRntiUl) | 1406 if ((*it).first == m_nextRntiUl) |
1408 { | 1407 { |
1409 break; | 1408 break; |
1410 } | 1409 } |
1411 } | 1410 } |
(...skipping 18 matching lines...) Expand all Loading... |
1430 if (it == m_ceBsrRxed.end ()) | 1429 if (it == m_ceBsrRxed.end ()) |
1431 { | 1430 { |
1432 // restart from the first | 1431 // restart from the first |
1433 it = m_ceBsrRxed.begin (); | 1432 it = m_ceBsrRxed.begin (); |
1434 } | 1433 } |
1435 continue; | 1434 continue; |
1436 } | 1435 } |
1437 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) | 1436 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) |
1438 { | 1437 { |
1439 // limit to physical resources last resource assignment | 1438 // limit to physical resources last resource assignment |
1440 rbPerFlow = static_cast<uint16_t>(m_cschedCellConfig.m_ulBandwidth - r
bAllocated); | 1439 rbPerFlow = m_cschedCellConfig.m_ulBandwidth - rbAllocated; |
1441 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes | 1440 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes |
1442 if (rbPerFlow < 3) | 1441 if (rbPerFlow < 3) |
1443 { | 1442 { |
1444 // terminate allocation | 1443 // terminate allocation |
1445 rbPerFlow = 0;······ | 1444 rbPerFlow = 0;······ |
1446 } | 1445 } |
1447 } | 1446 } |
1448 | 1447 |
1449 UlDciListElement_s uldci; | 1448 UlDciListElement_s uldci; |
1450 uldci.m_rnti = (*it).first; | 1449 uldci.m_rnti = (*it).first; |
1451 uldci.m_rbLen = static_cast<uint8_t>(rbPerFlow); | 1450 uldci.m_rbLen = static_cast<uint8_t> (rbPerFlow); |
1452 uldci.m_rbStart = 0; | 1451 uldci.m_rbStart = 0; |
1453 bool allocated = false; | 1452 bool allocated = false; |
1454 NS_LOG_INFO (this << " RB Allocated " << rbAllocated << " rbPerFlow " << r
bPerFlow << " flows " << nflows); | 1453 NS_LOG_INFO (this << " RB Allocated " << rbAllocated << " rbPerFlow " << r
bPerFlow << " flows " << nflows); |
1455 while ((!allocated)&&((rbAllocated + rbPerFlow - m_cschedCellConfig.m_ulBa
ndwidth) < 1) && (rbPerFlow != 0)) | 1454 while ((!allocated)&&((rbAllocated + rbPerFlow - m_cschedCellConfig.m_ulBa
ndwidth) < 1) && (rbPerFlow != 0)) |
1456 { | 1455 { |
1457 // check availability | 1456 // check availability |
1458 bool free = true; | 1457 bool free = true; |
1459 for (uint16_t j = static_cast<uint16_t>(rbAllocated); j < static_cast<
uint16_t>(rbAllocated + rbPerFlow); j++) | 1458 for (uint16_t j = rbAllocated; j < rbAllocated + rbPerFlow; j++) |
1460 { | 1459 { |
1461 if (rbMap.at (j) == true) | 1460 if (rbMap.at (j) == true) |
1462 { | 1461 { |
1463 free = false; | 1462 free = false; |
1464 break; | 1463 break; |
1465 } | 1464 } |
1466 } | 1465 } |
1467 if (free) | 1466 if (free) |
1468 { | 1467 { |
1469 uldci.m_rbStart = static_cast<uint8_t>(rbAllocated); | 1468 uldci.m_rbStart = static_cast<uint8_t> (rbAllocated); |
1470 | 1469 |
1471 for (uint16_t j = static_cast<uint16_t>(rbAllocated); j < static_c
ast<uint16_t>(rbAllocated + rbPerFlow); j++) | 1470 for (uint16_t j = rbAllocated; j < rbAllocated + rbPerFlow; j++) |
1472 { | 1471 { |
1473 rbMap.at (j) = true; | 1472 rbMap.at (j) = true; |
1474 // store info on allocation for managing ul-cqi interpretation | 1473 // store info on allocation for managing ul-cqi interpretation |
1475 rbgAllocationMap.at (j) = (*it).first; | 1474 rbgAllocationMap.at (j) = (*it).first; |
1476 } | 1475 } |
1477 rbAllocated += rbPerFlow; | 1476 rbAllocated += rbPerFlow; |
1478 allocated = true; | 1477 allocated = true; |
1479 break; | 1478 break; |
1480 } | 1479 } |
1481 rbAllocated++; | 1480 rbAllocated++; |
1482 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) | 1481 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) |
1483 { | 1482 { |
1484 // limit to physical resources last resource assignment | 1483 // limit to physical resources last resource assignment |
1485 rbPerFlow = static_cast<uint16_t>(m_cschedCellConfig.m_ulBandwidth
- rbAllocated); | 1484 rbPerFlow = m_cschedCellConfig.m_ulBandwidth - rbAllocated; |
1486 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes | 1485 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes |
1487 if (rbPerFlow < 3) | 1486 if (rbPerFlow < 3) |
1488 { | 1487 { |
1489 // terminate allocation | 1488 // terminate allocation |
1490 rbPerFlow = 0;················· | 1489 rbPerFlow = 0;················· |
1491 } | 1490 } |
1492 } | 1491 } |
1493 } | 1492 } |
1494 if (!allocated) | 1493 if (!allocated) |
1495 { | 1494 { |
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1547 it = m_ceBsrRxed.begin (); | 1546 it = m_ceBsrRxed.begin (); |
1548 } | 1547 } |
1549 NS_LOG_DEBUG (this << " UE discared for CQI=0, RNTI " << uldci.m_r
nti); | 1548 NS_LOG_DEBUG (this << " UE discared for CQI=0, RNTI " << uldci.m_r
nti); |
1550 // remove UE from allocation map | 1549 // remove UE from allocation map |
1551 for (uint16_t i = uldci.m_rbStart; i < uldci.m_rbStart + uldci.m_r
bLen; i++) | 1550 for (uint16_t i = uldci.m_rbStart; i < uldci.m_rbStart + uldci.m_r
bLen; i++) |
1552 { | 1551 { |
1553 rbgAllocationMap.at (i) = 0; | 1552 rbgAllocationMap.at (i) = 0; |
1554 } | 1553 } |
1555 continue; // CQI == 0 means "out of range" (see table 7.2.3-1 of 3
6.213) | 1554 continue; // CQI == 0 means "out of range" (see table 7.2.3-1 of 3
6.213) |
1556 } | 1555 } |
1557 uldci.m_mcs = static_cast<uint8_t>(m_amc->GetMcsFromCqi (cqi)); | 1556 uldci.m_mcs = m_amc->GetMcsFromCqi (cqi); |
1558 } | 1557 } |
1559 | 1558 |
1560 uldci.m_tbSize = static_cast<uint16_t>(m_amc->GetTbSizeFromMcs (uldci.m_mc
s, rbPerFlow) / 8); | 1559 uldci.m_tbSize = (m_amc->GetUlTbSizeFromMcs (uldci.m_mcs, rbPerFlow) / 8); |
1561 UpdateUlRlcBufferInfo (uldci.m_rnti, uldci.m_tbSize); | 1560 UpdateUlRlcBufferInfo (uldci.m_rnti, uldci.m_tbSize); |
1562 uldci.m_ndi = 1; | 1561 uldci.m_ndi = 1; |
1563 uldci.m_cceIndex = 0; | 1562 uldci.m_cceIndex = 0; |
1564 uldci.m_aggrLevel = 1; | 1563 uldci.m_aggrLevel = 1; |
1565 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF | 1564 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF |
1566 uldci.m_hopping = false; | 1565 uldci.m_hopping = false; |
1567 uldci.m_n2Dmrs = 0; | 1566 uldci.m_n2Dmrs = 0; |
1568 uldci.m_tpc = 0; // no power control | 1567 uldci.m_tpc = 0; // no power control |
1569 uldci.m_cqiRequest = false; // only period CQI at this stage | 1568 uldci.m_cqiRequest = false; // only period CQI at this stage |
1570 uldci.m_ulIndex = 0; // TDD parameter | 1569 uldci.m_ulIndex = 0; // TDD parameter |
(...skipping 49 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1620 m_allocationMaps.insert (std::pair <uint16_t, std::vector <uint16_t> > (params
.m_sfnSf, rbgAllocationMap)); | 1619 m_allocationMaps.insert (std::pair <uint16_t, std::vector <uint16_t> > (params
.m_sfnSf, rbgAllocationMap)); |
1621 m_schedSapUser->SchedUlConfigInd (ret); | 1620 m_schedSapUser->SchedUlConfigInd (ret); |
1622 | 1621 |
1623 return; | 1622 return; |
1624 } | 1623 } |
1625 | 1624 |
1626 void | 1625 void |
1627 TtaFfMacScheduler::DoSchedUlNoiseInterferenceReq (const struct FfMacSchedSapProv
ider::SchedUlNoiseInterferenceReqParameters& params) | 1626 TtaFfMacScheduler::DoSchedUlNoiseInterferenceReq (const struct FfMacSchedSapProv
ider::SchedUlNoiseInterferenceReqParameters& params) |
1628 { | 1627 { |
1629 NS_LOG_FUNCTION (this); | 1628 NS_LOG_FUNCTION (this); |
1630 NS_UNUSED(params); | 1629 NS_UNUSED (params); |
1631 return; | 1630 return; |
1632 } | 1631 } |
1633 | 1632 |
1634 void | 1633 void |
1635 TtaFfMacScheduler::DoSchedUlSrInfoReq (const struct FfMacSchedSapProvider::Sched
UlSrInfoReqParameters& params) | 1634 TtaFfMacScheduler::DoSchedUlSrInfoReq (const struct FfMacSchedSapProvider::Sched
UlSrInfoReqParameters& params) |
1636 { | 1635 { |
1637 NS_LOG_FUNCTION (this); | 1636 NS_LOG_FUNCTION (this); |
1638 NS_UNUSED(params); | 1637 NS_UNUSED (params); |
1639 return; | 1638 return; |
1640 } | 1639 } |
1641 | 1640 |
1642 void | 1641 void |
1643 TtaFfMacScheduler::DoSchedUlMacCtrlInfoReq (const struct FfMacSchedSapProvider::
SchedUlMacCtrlInfoReqParameters& params) | 1642 TtaFfMacScheduler::DoSchedUlMacCtrlInfoReq (const struct FfMacSchedSapProvider::
SchedUlMacCtrlInfoReqParameters& params) |
1644 { | 1643 { |
1645 NS_LOG_FUNCTION (this); | 1644 NS_LOG_FUNCTION (this); |
1646 | 1645 |
1647 std::map <uint16_t,uint32_t>::iterator it; | 1646 std::map <uint16_t,uint32_t>::iterator it; |
1648 | 1647 |
(...skipping 347 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1996 { | 1995 { |
1997 NS_LOG_FUNCTION (this << " RNTI " << rnti << " txMode " << (uint16_t)txMode); | 1996 NS_LOG_FUNCTION (this << " RNTI " << rnti << " txMode " << (uint16_t)txMode); |
1998 FfMacCschedSapUser::CschedUeConfigUpdateIndParameters params; | 1997 FfMacCschedSapUser::CschedUeConfigUpdateIndParameters params; |
1999 params.m_rnti = rnti; | 1998 params.m_rnti = rnti; |
2000 params.m_transmissionMode = txMode; | 1999 params.m_transmissionMode = txMode; |
2001 m_cschedSapUser->CschedUeConfigUpdateInd (params); | 2000 m_cschedSapUser->CschedUeConfigUpdateInd (params); |
2002 } | 2001 } |
2003 | 2002 |
2004 | 2003 |
2005 } | 2004 } |
LEFT | RIGHT |