LEFT | RIGHT |
1 /* -*- Mode:C++; c-file-style:"gnu"; indent-tabs-mode:nil; -*- */ | 1 /* -*- Mode:C++; c-file-style:"gnu"; indent-tabs-mode:nil; -*- */ |
2 /* | 2 /* |
3 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC) | 3 * Copyright (c) 2011 Centre Tecnologic de Telecomunicacions de Catalunya (CTTC) |
4 * | 4 * |
5 * This program is free software; you can redistribute it and/or modify | 5 * This program is free software; you can redistribute it and/or modify |
6 * it under the terms of the GNU General Public License version 2 as | 6 * it under the terms of the GNU General Public License version 2 as |
7 * published by the Free Software Foundation; | 7 * published by the Free Software Foundation; |
8 * | 8 * |
9 * This program is distributed in the hope that it will be useful, | 9 * This program is distributed in the hope that it will be useful, |
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of | 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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494 int rbgSize = GetRbgSize (m_cschedCellConfig.m_dlBandwidth); | 494 int rbgSize = GetRbgSize (m_cschedCellConfig.m_dlBandwidth); |
495 int rbgNum = m_cschedCellConfig.m_dlBandwidth / rbgSize; | 495 int rbgNum = m_cschedCellConfig.m_dlBandwidth / rbgSize; |
496 std::map <uint16_t, std::vector <uint16_t> > allocationMap; // RBs map per RNT
I | 496 std::map <uint16_t, std::vector <uint16_t> > allocationMap; // RBs map per RNT
I |
497 std::vector <bool> rbgMap; // global RBGs map | 497 std::vector <bool> rbgMap; // global RBGs map |
498 uint16_t rbgAllocatedNum = 0; | 498 uint16_t rbgAllocatedNum = 0; |
499 std::set <uint16_t> rntiAllocated; | 499 std::set <uint16_t> rntiAllocated; |
500 rbgMap.resize (m_cschedCellConfig.m_dlBandwidth / rbgSize, false); | 500 rbgMap.resize (m_cschedCellConfig.m_dlBandwidth / rbgSize, false); |
501 FfMacSchedSapUser::SchedDlConfigIndParameters ret; | 501 FfMacSchedSapUser::SchedDlConfigIndParameters ret; |
502 | 502 |
503 // update UL HARQ proc id | 503 // update UL HARQ proc id |
504 std::map <uint16_t, uint8_t>::iterator itProcId; | 504 for (std::map <uint16_t, uint8_t>::iterator itProcId = m_ulHarqCurrentProcessI
d.begin (); itProcId != m_ulHarqCurrentProcessId.end (); itProcId++) |
505 for (itProcId = m_ulHarqCurrentProcessId.begin (); itProcId != m_ulHarqCurrent
ProcessId.end (); itProcId++) | |
506 { | 505 { |
507 (*itProcId).second = ((*itProcId).second + 1) % HARQ_PROC_NUM; | 506 (*itProcId).second = ((*itProcId).second + 1) % HARQ_PROC_NUM; |
508 } | 507 } |
509 | 508 |
510 // RACH Allocation | 509 // RACH Allocation |
511 m_rachAllocationMap.resize (m_cschedCellConfig.m_ulBandwidth, 0); | 510 m_rachAllocationMap.resize (m_cschedCellConfig.m_ulBandwidth, 0); |
512 uint16_t rbStart = 0; | 511 uint8_t rbStart = 0; |
513 std::vector <struct RachListElement_s>::iterator itRach; | 512 std::vector <struct RachListElement_s>::iterator itRach; |
514 for (itRach = m_rachList.begin (); itRach != m_rachList.end (); itRach++) | 513 for (itRach = m_rachList.begin (); itRach != m_rachList.end (); itRach++) |
515 { | 514 { |
516 NS_ASSERT_MSG (m_amc->GetTbSizeFromMcs (m_ulGrantMcs, m_cschedCellConfig.m
_ulBandwidth) > (*itRach).m_estimatedSize, " Default UL Grant MCS does not allow
to send RACH messages"); | 515 NS_ASSERT_MSG (m_amc->GetUlTbSizeFromMcs (m_ulGrantMcs, m_cschedCellConfig
.m_ulBandwidth) > (*itRach).m_estimatedSize, " Default UL Grant MCS does not all
ow to send RACH messages"); |
517 BuildRarListElement_s newRar; | 516 BuildRarListElement_s newRar; |
518 newRar.m_rnti = (*itRach).m_rnti; | 517 newRar.m_rnti = (*itRach).m_rnti; |
519 // DL-RACH Allocation | 518 // DL-RACH Allocation |
520 // Ideal: no needs of configuring m_dci | 519 // Ideal: no needs of configuring m_dci |
521 // UL-RACH Allocation | 520 // UL-RACH Allocation |
522 newRar.m_grant.m_rnti = newRar.m_rnti; | 521 newRar.m_grant.m_rnti = newRar.m_rnti; |
523 newRar.m_grant.m_mcs = m_ulGrantMcs; | 522 newRar.m_grant.m_mcs = m_ulGrantMcs; |
524 uint16_t rbLen = 1; | 523 uint8_t rbLen = 1; |
525 uint16_t tbSizeBits = 0; | 524 uint16_t tbSizeBits = 0; |
526 // find lowest TB size that fits UL grant estimated size | 525 // find lowest TB size that fits UL grant estimated size |
527 while ((tbSizeBits < (*itRach).m_estimatedSize) && (rbStart + rbLen < m_cs
chedCellConfig.m_ulBandwidth)) | 526 while ((tbSizeBits < (*itRach).m_estimatedSize) && (rbStart + rbLen < m_cs
chedCellConfig.m_ulBandwidth)) |
528 { | 527 { |
529 rbLen++; | 528 rbLen++; |
530 tbSizeBits = static_cast<uint16_t>(m_amc->GetTbSizeFromMcs (m_ulGrantM
cs, rbLen)); | 529 tbSizeBits = m_amc->GetUlTbSizeFromMcs (m_ulGrantMcs, rbLen); |
531 } | 530 } |
532 if (tbSizeBits < (*itRach).m_estimatedSize) | 531 if (tbSizeBits < (*itRach).m_estimatedSize) |
533 { | 532 { |
534 // no more allocation space: finish allocation | 533 // no more allocation space: finish allocation |
535 break; | 534 break; |
536 } | 535 } |
537 newRar.m_grant.m_rbStart = static_cast<uint8_t>(rbStart); | 536 newRar.m_grant.m_rbStart = rbStart; |
538 newRar.m_grant.m_rbLen = static_cast<uint8_t>(rbLen); | 537 newRar.m_grant.m_rbLen = rbLen; |
539 newRar.m_grant.m_tbSize = tbSizeBits / 8; | 538 newRar.m_grant.m_tbSize = tbSizeBits / 8; |
540 newRar.m_grant.m_hopping = false; | 539 newRar.m_grant.m_hopping = false; |
541 newRar.m_grant.m_tpc = 0; | 540 newRar.m_grant.m_tpc = 0; |
542 newRar.m_grant.m_cqiRequest = false; | 541 newRar.m_grant.m_cqiRequest = false; |
543 newRar.m_grant.m_ulDelay = false; | 542 newRar.m_grant.m_ulDelay = false; |
544 NS_LOG_INFO (this << " UL grant allocated to RNTI " << (*itRach).m_rnti <<
" rbStart " << rbStart << " rbLen " << rbLen << " MCS " << m_ulGrantMcs << " tb
Size " << newRar.m_grant.m_tbSize); | 543 NS_LOG_INFO (this << " UL grant allocated to RNTI " << (*itRach).m_rnti <<
" rbStart " << rbStart << " rbLen " << rbLen << " MCS " << m_ulGrantMcs << " tb
Size " << newRar.m_grant.m_tbSize); |
545 for (uint16_t i = rbStart; i < rbStart + rbLen; i++) | 544 for (uint16_t i = rbStart; i < rbStart + rbLen; i++) |
546 { | 545 { |
547 m_rachAllocationMap.at (i) = (*itRach).m_rnti; | 546 m_rachAllocationMap.at (i) = (*itRach).m_rnti; |
548 } | 547 } |
549 | 548 |
550 if (m_harqOn == true) | 549 if (m_harqOn == true) |
551 { | 550 { |
552 // generate UL-DCI for HARQ retransmissions | 551 // generate UL-DCI for HARQ retransmissions |
553 UlDciListElement_s uldci; | 552 UlDciListElement_s uldci; |
554 uldci.m_rnti = newRar.m_rnti; | 553 uldci.m_rnti = newRar.m_rnti; |
555 uldci.m_rbLen = static_cast<uint8_t>(rbLen); | 554 uldci.m_rbLen = rbLen; |
556 uldci.m_rbStart = static_cast<uint8_t>(rbStart); | 555 uldci.m_rbStart = rbStart; |
557 uldci.m_mcs = m_ulGrantMcs; | 556 uldci.m_mcs = m_ulGrantMcs; |
558 uldci.m_tbSize = tbSizeBits / 8; | 557 uldci.m_tbSize = tbSizeBits / 8; |
559 uldci.m_ndi = 1; | 558 uldci.m_ndi = 1; |
560 uldci.m_cceIndex = 0; | 559 uldci.m_cceIndex = 0; |
561 uldci.m_aggrLevel = 1; | 560 uldci.m_aggrLevel = 1; |
562 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF | 561 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF |
563 uldci.m_hopping = false; | 562 uldci.m_hopping = false; |
564 uldci.m_n2Dmrs = 0; | 563 uldci.m_n2Dmrs = 0; |
565 uldci.m_tpc = 0; // no power control | 564 uldci.m_tpc = 0; // no power control |
566 uldci.m_cqiRequest = false; // only period CQI at this stage | 565 uldci.m_cqiRequest = false; // only period CQI at this stage |
567 uldci.m_ulIndex = 0; // TDD parameter | 566 uldci.m_ulIndex = 0; // TDD parameter |
568 uldci.m_dai = 1; // TDD parameter | 567 uldci.m_dai = 1; // TDD parameter |
569 uldci.m_freqHopping = 0; | 568 uldci.m_freqHopping = 0; |
570 uldci.m_pdcchPowerOffset = 0; // not used | 569 uldci.m_pdcchPowerOffset = 0; // not used |
571 | 570 |
572 uint8_t harqId = 0; | 571 uint8_t harqId = 0; |
573 std::map <uint16_t, uint8_t>::iterator itProcId1; | 572 std::map <uint16_t, uint8_t>::iterator itProcId; |
574 itProcId1 = m_ulHarqCurrentProcessId.find (uldci.m_rnti); | 573 itProcId = m_ulHarqCurrentProcessId.find (uldci.m_rnti); |
575 if (itProcId1 == m_ulHarqCurrentProcessId.end ()) | 574 if (itProcId == m_ulHarqCurrentProcessId.end ()) |
576 { | 575 { |
577 NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << uldci.m_r
nti); | 576 NS_FATAL_ERROR ("No info find in HARQ buffer for UE " << uldci.m_r
nti); |
578 } | 577 } |
579 harqId = (*itProcId1).second; | 578 harqId = (*itProcId).second; |
580 std::map <uint16_t, UlHarqProcessesDciBuffer_t>::iterator itDci = m_ul
HarqProcessesDciBuffer.find (uldci.m_rnti); | 579 std::map <uint16_t, UlHarqProcessesDciBuffer_t>::iterator itDci = m_ul
HarqProcessesDciBuffer.find (uldci.m_rnti); |
581 if (itDci == m_ulHarqProcessesDciBuffer.end ()) | 580 if (itDci == m_ulHarqProcessesDciBuffer.end ()) |
582 { | 581 { |
583 NS_FATAL_ERROR ("Unable to find RNTI entry in UL DCI HARQ buffer f
or RNTI " << uldci.m_rnti); | 582 NS_FATAL_ERROR ("Unable to find RNTI entry in UL DCI HARQ buffer f
or RNTI " << uldci.m_rnti); |
584 } | 583 } |
585 (*itDci).second.at (harqId) = uldci; | 584 (*itDci).second.at (harqId) = uldci; |
586 } | 585 } |
587 | 586 |
588 rbStart = rbStart + rbLen; | 587 rbStart = rbStart + rbLen; |
589 ret.m_buildRarList.push_back (newRar); | 588 ret.m_buildRarList.push_back (newRar); |
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860 { | 859 { |
861 // all the RBGs are already allocated -> exit | 860 // all the RBGs are already allocated -> exit |
862 if ((ret.m_buildDataList.size () > 0) || (ret.m_buildRarList.size () > 0)) | 861 if ((ret.m_buildDataList.size () > 0) || (ret.m_buildRarList.size () > 0)) |
863 { | 862 { |
864 m_schedSapUser->SchedDlConfigInd (ret); | 863 m_schedSapUser->SchedDlConfigInd (ret); |
865 } | 864 } |
866 return; | 865 return; |
867 } | 866 } |
868 | 867 |
869 | 868 |
870 std::map <uint16_t, tdbetsFlowPerf_t>::iterator it; | |
871 std::map <uint16_t, tdbetsFlowPerf_t>::iterator itMax = m_flowStatsDl.end (); | 869 std::map <uint16_t, tdbetsFlowPerf_t>::iterator itMax = m_flowStatsDl.end (); |
872 double metricMax = 0.0; | 870 double metricMax = 0.0; |
873 for (it = m_flowStatsDl.begin (); it != m_flowStatsDl.end (); it++) | 871 for (std::map <uint16_t, tdbetsFlowPerf_t>::iterator it = m_flowStatsDl.begin
(); it != m_flowStatsDl.end (); it++) |
874 { | 872 { |
875 | 873 |
876 // check first what are channel conditions for this UE, if CQI!=0 | 874 // check first what are channel conditions for this UE, if CQI!=0 |
877 std::map <uint16_t,uint8_t>::iterator itCqi; | 875 std::map <uint16_t,uint8_t>::iterator itCqi; |
878 itCqi = m_p10CqiRxed.find ((*it).first); | 876 itCqi = m_p10CqiRxed.find ((*it).first); |
879 std::map <uint16_t,uint8_t>::iterator itTxMode; | 877 std::map <uint16_t,uint8_t>::iterator itTxMode; |
880 itTxMode = m_uesTxMode.find ((*it).first); | 878 itTxMode = m_uesTxMode.find ((*it).first); |
881 if (itTxMode == m_uesTxMode.end ()) | 879 if (itTxMode == m_uesTxMode.end ()) |
882 { | 880 { |
883 NS_FATAL_ERROR ("No Transmission Mode info on user " << (*it).first); | 881 NS_FATAL_ERROR ("No Transmission Mode info on user " << (*it).first); |
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984 | 982 |
985 uint32_t bytesTxed = 0; | 983 uint32_t bytesTxed = 0; |
986 for (uint8_t j = 0; j < nLayer; j++) | 984 for (uint8_t j = 0; j < nLayer; j++) |
987 { | 985 { |
988 if (itCqi == m_p10CqiRxed.end ()) | 986 if (itCqi == m_p10CqiRxed.end ()) |
989 { | 987 { |
990 newDci.m_mcs.push_back (0); // no info on this user -> lowest MCS | 988 newDci.m_mcs.push_back (0); // no info on this user -> lowest MCS |
991 } | 989 } |
992 else | 990 else |
993 { | 991 { |
994 newDci.m_mcs.push_back ( static_cast<uint8_t>(m_amc->GetMcsFromCqi
((*itCqi).second) )); | 992 newDci.m_mcs.push_back ( m_amc->GetMcsFromCqi ((*itCqi).second) ); |
995 } | 993 } |
996 | 994 |
997 int tbSize = (m_amc->GetTbSizeFromMcs (newDci.m_mcs.at (j), RgbPerRnti
* rbgSize) / 8); // (size of TB in bytes according to table 7.1.7.2.1-1 of 36.2
13) | 995 int tbSize = (m_amc->GetDlTbSizeFromMcs (newDci.m_mcs.at (j), RgbPerRn
ti * rbgSize) / 8); // (size of TB in bytes according to table 7.1.7.2.1-1 of 36
.213) |
998 newDci.m_tbsSize.push_back (static_cast<uint16_t>(tbSize)); | 996 newDci.m_tbsSize.push_back (static_cast<uint16_t>(tbSize)); |
999 bytesTxed += tbSize; | 997 bytesTxed += tbSize; |
1000 } | 998 } |
1001 | 999 |
1002 newDci.m_resAlloc = 0; // only allocation type 0 at this stage | 1000 newDci.m_resAlloc = 0; // only allocation type 0 at this stage |
1003 newDci.m_rbBitmap = 0; // TBD (32 bit bitmap see 7.1.6 of 36.213) | 1001 newDci.m_rbBitmap = 0; // TBD (32 bit bitmap see 7.1.6 of 36.213) |
1004 uint32_t rbgMask = 0; | 1002 uint32_t rbgMask = 0; |
1005 for (uint16_t k = 0; k < (*itMap).second.size (); k++) | 1003 for (uint16_t k = 0; k < (*itMap).second.size (); k++) |
1006 { | 1004 { |
1007 rbgMask = rbgMask + (0x1 << (*itMap).second.at (k)); | 1005 rbgMask = rbgMask + (0x1 << (*itMap).second.at (k)); |
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1070 { | 1068 { |
1071 NS_FATAL_ERROR ("Unable to find HARQ timer for RNTI " << (uint16_t
)newEl.m_rnti); | 1069 NS_FATAL_ERROR ("Unable to find HARQ timer for RNTI " << (uint16_t
)newEl.m_rnti); |
1072 } | 1070 } |
1073 (*itHarqTimer).second.at (newDci.m_harqProcess) = 0; | 1071 (*itHarqTimer).second.at (newDci.m_harqProcess) = 0; |
1074 } | 1072 } |
1075 | 1073 |
1076 // ...more parameters -> ingored in this version | 1074 // ...more parameters -> ingored in this version |
1077 | 1075 |
1078 ret.m_buildDataList.push_back (newEl); | 1076 ret.m_buildDataList.push_back (newEl); |
1079 // update UE stats | 1077 // update UE stats |
1080 std::map <uint16_t, tdbetsFlowPerf_t>::iterator it1; | 1078 std::map <uint16_t, tdbetsFlowPerf_t>::iterator it; |
1081 it1 = m_flowStatsDl.find ((*itMap).first); | 1079 it = m_flowStatsDl.find ((*itMap).first); |
1082 if (it1 != m_flowStatsDl.end ()) | 1080 if (it != m_flowStatsDl.end ()) |
1083 { | 1081 { |
1084 (*it1).second.lastTtiBytesTrasmitted = bytesTxed; | 1082 (*it).second.lastTtiBytesTrasmitted = bytesTxed; |
1085 NS_LOG_INFO (this << " UE total bytes txed " << (*it1).second.lastTtiB
ytesTrasmitted); | 1083 NS_LOG_INFO (this << " UE total bytes txed " << (*it).second.lastTtiBy
tesTrasmitted); |
1086 | 1084 |
1087 | 1085 |
1088 } | 1086 } |
1089 else | 1087 else |
1090 { | 1088 { |
1091 NS_FATAL_ERROR (this << " No Stats for this allocated UE"); | 1089 NS_FATAL_ERROR (this << " No Stats for this allocated UE"); |
1092 } | 1090 } |
1093 | 1091 |
1094 itMap++; | 1092 itMap++; |
1095 } // end while allocation | 1093 } // end while allocation |
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1345 return; // no flows to be scheduled | 1343 return; // no flows to be scheduled |
1346 } | 1344 } |
1347 | 1345 |
1348 | 1346 |
1349 // Divide the remaining resources equally among the active users starting from
the subsequent one served last scheduling trigger | 1347 // Divide the remaining resources equally among the active users starting from
the subsequent one served last scheduling trigger |
1350 uint16_t rbPerFlow = static_cast<uint16_t>((m_cschedCellConfig.m_ulBandwidth /
(nflows + rntiAllocated.size ()))); | 1348 uint16_t rbPerFlow = static_cast<uint16_t>((m_cschedCellConfig.m_ulBandwidth /
(nflows + rntiAllocated.size ()))); |
1351 if (rbPerFlow < 3) | 1349 if (rbPerFlow < 3) |
1352 { | 1350 { |
1353 rbPerFlow = 3; // at least 3 rbg per flow (till available resource) to en
sure TxOpportunity >= 7 bytes | 1351 rbPerFlow = 3; // at least 3 rbg per flow (till available resource) to en
sure TxOpportunity >= 7 bytes |
1354 } | 1352 } |
1355 int rbAllocated = 0; | 1353 uint16_t rbAllocated = 0; |
1356 | 1354 |
1357 std::map <uint16_t, tdbetsFlowPerf_t>::iterator itStats; | 1355 std::map <uint16_t, tdbetsFlowPerf_t>::iterator itStats; |
1358 if (m_nextRntiUl != 0) | 1356 if (m_nextRntiUl != 0) |
1359 { | 1357 { |
1360 for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++) | 1358 for (it = m_ceBsrRxed.begin (); it != m_ceBsrRxed.end (); it++) |
1361 { | 1359 { |
1362 if ((*it).first == m_nextRntiUl) | 1360 if ((*it).first == m_nextRntiUl) |
1363 { | 1361 { |
1364 break; | 1362 break; |
1365 } | 1363 } |
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1385 if (it == m_ceBsrRxed.end ()) | 1383 if (it == m_ceBsrRxed.end ()) |
1386 { | 1384 { |
1387 // restart from the first | 1385 // restart from the first |
1388 it = m_ceBsrRxed.begin (); | 1386 it = m_ceBsrRxed.begin (); |
1389 } | 1387 } |
1390 continue; | 1388 continue; |
1391 } | 1389 } |
1392 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) | 1390 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) |
1393 { | 1391 { |
1394 // limit to physical resources last resource assignment | 1392 // limit to physical resources last resource assignment |
1395 rbPerFlow = static_cast<uint16_t>(m_cschedCellConfig.m_ulBandwidth - r
bAllocated); | 1393 rbPerFlow = m_cschedCellConfig.m_ulBandwidth - rbAllocated; |
1396 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes | 1394 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes |
1397 if (rbPerFlow < 3) | 1395 if (rbPerFlow < 3) |
1398 { | 1396 { |
1399 // terminate allocation | 1397 // terminate allocation |
1400 rbPerFlow = 0;······ | 1398 rbPerFlow = 0;······ |
1401 } | 1399 } |
1402 } | 1400 } |
1403 | 1401 |
1404 UlDciListElement_s uldci; | 1402 UlDciListElement_s uldci; |
1405 uldci.m_rnti = (*it).first; | 1403 uldci.m_rnti = (*it).first; |
1406 uldci.m_rbLen = static_cast<uint8_t>(rbPerFlow); | 1404 uldci.m_rbLen = static_cast<uint8_t>(rbPerFlow); |
1407 uldci.m_rbStart = 0; | 1405 uldci.m_rbStart = 0; |
1408 bool allocated = false; | 1406 bool allocated = false; |
1409 NS_LOG_INFO (this << " RB Allocated " << rbAllocated << " rbPerFlow " << r
bPerFlow << " flows " << nflows); | 1407 NS_LOG_INFO (this << " RB Allocated " << rbAllocated << " rbPerFlow " << r
bPerFlow << " flows " << nflows); |
1410 while ((!allocated)&&((rbAllocated + rbPerFlow - m_cschedCellConfig.m_ulBa
ndwidth) < 1) && (rbPerFlow != 0)) | 1408 while ((!allocated)&&((rbAllocated + rbPerFlow - m_cschedCellConfig.m_ulBa
ndwidth) < 1) && (rbPerFlow != 0)) |
1411 { | 1409 { |
1412 // check availability | 1410 // check availability |
1413 bool free = true; | 1411 bool free = true; |
1414 for (uint16_t j = static_cast<uint16_t>(rbAllocated); j < static_cast<
uint16_t>(rbAllocated + rbPerFlow); j++) | 1412 for (uint16_t j = rbAllocated; j < rbAllocated + rbPerFlow; j++) |
1415 { | 1413 { |
1416 if (rbMap.at (j) == true) | 1414 if (rbMap.at (j) == true) |
1417 { | 1415 { |
1418 free = false; | 1416 free = false; |
1419 break; | 1417 break; |
1420 } | 1418 } |
1421 } | 1419 } |
1422 if (free) | 1420 if (free) |
1423 { | 1421 { |
1424 uldci.m_rbStart = static_cast<uint8_t>(rbAllocated); | 1422 uldci.m_rbStart = static_cast<uint8_t>(rbAllocated); |
1425 | 1423 |
1426 for (uint16_t j = static_cast<uint16_t>(rbAllocated); j < static_c
ast<uint16_t>(rbAllocated + rbPerFlow); j++) | 1424 for (uint16_t j = rbAllocated; j < rbAllocated + rbPerFlow; j++) |
1427 { | 1425 { |
1428 rbMap.at (j) = true; | 1426 rbMap.at (j) = true; |
1429 // store info on allocation for managing ul-cqi interpretation | 1427 // store info on allocation for managing ul-cqi interpretation |
1430 rbgAllocationMap.at (j) = (*it).first; | 1428 rbgAllocationMap.at (j) = (*it).first; |
1431 } | 1429 } |
1432 rbAllocated += rbPerFlow; | 1430 rbAllocated += rbPerFlow; |
1433 allocated = true; | 1431 allocated = true; |
1434 break; | 1432 break; |
1435 } | 1433 } |
1436 rbAllocated++; | 1434 rbAllocated++; |
1437 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) | 1435 if (rbAllocated + rbPerFlow - 1 > m_cschedCellConfig.m_ulBandwidth) |
1438 { | 1436 { |
1439 // limit to physical resources last resource assignment | 1437 // limit to physical resources last resource assignment |
1440 rbPerFlow = static_cast<uint16_t>(m_cschedCellConfig.m_ulBandwidth
- rbAllocated); | 1438 rbPerFlow = m_cschedCellConfig.m_ulBandwidth - rbAllocated; |
1441 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes | 1439 // at least 3 rbg per flow to ensure TxOpportunity >= 7 bytes |
1442 if (rbPerFlow < 3) | 1440 if (rbPerFlow < 3) |
1443 { | 1441 { |
1444 // terminate allocation | 1442 // terminate allocation |
1445 rbPerFlow = 0;················· | 1443 rbPerFlow = 0;················· |
1446 } | 1444 } |
1447 } | 1445 } |
1448 } | 1446 } |
1449 if (!allocated) | 1447 if (!allocated) |
1450 { | 1448 { |
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1502 it = m_ceBsrRxed.begin (); | 1500 it = m_ceBsrRxed.begin (); |
1503 } | 1501 } |
1504 NS_LOG_DEBUG (this << " UE discared for CQI=0, RNTI " << uldci.m_r
nti); | 1502 NS_LOG_DEBUG (this << " UE discared for CQI=0, RNTI " << uldci.m_r
nti); |
1505 // remove UE from allocation map | 1503 // remove UE from allocation map |
1506 for (uint16_t i = uldci.m_rbStart; i < uldci.m_rbStart + uldci.m_r
bLen; i++) | 1504 for (uint16_t i = uldci.m_rbStart; i < uldci.m_rbStart + uldci.m_r
bLen; i++) |
1507 { | 1505 { |
1508 rbgAllocationMap.at (i) = 0; | 1506 rbgAllocationMap.at (i) = 0; |
1509 } | 1507 } |
1510 continue; // CQI == 0 means "out of range" (see table 7.2.3-1 of 3
6.213) | 1508 continue; // CQI == 0 means "out of range" (see table 7.2.3-1 of 3
6.213) |
1511 } | 1509 } |
1512 uldci.m_mcs = static_cast<uint8_t>(m_amc->GetMcsFromCqi (cqi)); | 1510 uldci.m_mcs = m_amc->GetMcsFromCqi (cqi); |
1513 } | 1511 } |
1514 | 1512 |
1515 uldci.m_tbSize = static_cast<uint16_t>(m_amc->GetTbSizeFromMcs (uldci.m_mc
s, rbPerFlow) / 8); | 1513 uldci.m_tbSize = (m_amc->GetUlTbSizeFromMcs (uldci.m_mcs, rbPerFlow) / 8); |
1516 UpdateUlRlcBufferInfo (uldci.m_rnti, uldci.m_tbSize); | 1514 UpdateUlRlcBufferInfo (uldci.m_rnti, uldci.m_tbSize); |
1517 uldci.m_ndi = 1; | 1515 uldci.m_ndi = 1; |
1518 uldci.m_cceIndex = 0; | 1516 uldci.m_cceIndex = 0; |
1519 uldci.m_aggrLevel = 1; | 1517 uldci.m_aggrLevel = 1; |
1520 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF | 1518 uldci.m_ueTxAntennaSelection = 3; // antenna selection OFF |
1521 uldci.m_hopping = false; | 1519 uldci.m_hopping = false; |
1522 uldci.m_n2Dmrs = 0; | 1520 uldci.m_n2Dmrs = 0; |
1523 uldci.m_tpc = 0; // no power control | 1521 uldci.m_tpc = 0; // no power control |
1524 uldci.m_cqiRequest = false; // only period CQI at this stage | 1522 uldci.m_cqiRequest = false; // only period CQI at this stage |
1525 uldci.m_ulIndex = 0; // TDD parameter | 1523 uldci.m_ulIndex = 0; // TDD parameter |
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1973 { | 1971 { |
1974 NS_LOG_FUNCTION (this << " RNTI " << rnti << " txMode " << (uint16_t)txMode); | 1972 NS_LOG_FUNCTION (this << " RNTI " << rnti << " txMode " << (uint16_t)txMode); |
1975 FfMacCschedSapUser::CschedUeConfigUpdateIndParameters params; | 1973 FfMacCschedSapUser::CschedUeConfigUpdateIndParameters params; |
1976 params.m_rnti = rnti; | 1974 params.m_rnti = rnti; |
1977 params.m_transmissionMode = txMode; | 1975 params.m_transmissionMode = txMode; |
1978 m_cschedSapUser->CschedUeConfigUpdateInd (params); | 1976 m_cschedSapUser->CschedUeConfigUpdateInd (params); |
1979 } | 1977 } |
1980 | 1978 |
1981 | 1979 |
1982 } | 1980 } |
LEFT | RIGHT |