Issue 2539041: Massive integration with upstream code. This brings us up from r1130 to r1235 (Closed)
DescriptionMassive integration with upstream code. This brings us up from 1130 to 1235.
Most merges trivial (or near-trivial):
- Some print statements were adjusted to reduce verbosity.
- Partial update logic in flashrom.c changed to use upstream version.
- handle_romentries prototype from flash.h updated.
- updated chip ID entries in writeprotect.c
There is one UI change:
UI change: --wp-range on AGZ platform with Nuvoton EC no longer does --wp-enable implicitly. User should specify both --wp-range and --wp-enable using the same command on the CLI.
Minor code changes:
- Made it so that chip commands (set_wp_*) are not mutually exclusive with each other in cli_mfg.c. This allows us to set a write-protect range and enable write protection simultaneously. This was helpful for wpce775x changes (below).
WPCE775x code was completely re-factored to be a programmer instead of a chip. This was required to make it work with the new partial write logic. Here are the wpce775x.c changes:
Forward-ported the code to integrate with Flashrom more now that Flashrom has generic core routines for partial updates and such. This has the pleasant side-effect of simplifying the code and allowing us to trivially support a broad range of flash chips.
The updated flow is:
- internal_init() calls wpce775x_probe_* commands. Probing and WCB setup are done here. EC enters "update" mode (even if EC content is not being changed)
- Flashrom chip detect logic issues RDID command. The "flash" struct is determined with the corresponding flash chip..
- When read/write/erase/write protect functions are called, InitFlash() sets up WCB with appropriate chip parameters.
- wpce775x_shutdown() exits flash update mode.
Summary of wpce775x changes:
- Implemented SPI --> WCB translation interface.
- Switch over to using Flashrom's built-in partial write logic.
- Simplify WPCE775x probe/init routines. Since Flashrom will handle chip
detection by using the SPI --> WCB interface, we can remove chip-specific
stuff. Also, probe_wpce775x is now known as wpce775x_spi_common_init.
- Update all read, write, erase, and write-protect options with the ability
to support any SPI chip. This is done by allowing each function to change
WCB parameters on-the-fly using InitFlash().
(note: tested two different erase methods by forcing usage of either 4K or
64k erase block sizes)
- Remove wp_wpce775x struct; we no longer need it. We will use write protect
protect functions are provided for the detected chip (in writeprotect.c).
- Make in_flash_update_mode a boolean rather than a counter. When we do write protect changes we need to force the sequence: InitFlash(), EnterFlashUpdate(), ExitFlashUpdateFirmwareNoChange(). Using a counter
caused EnterFlashUpdate() and ExitFlashUpdateFirmwareNoChange() to abort prematurely.
Tested on:
Mario AGZ Alex
partial_writes_x86_bios PASS PASS PASS
partial_writes_ec PASS* PASS N/A
wp-range (bios) PASS PASS FAIL**
wp-range (ec) PASS PASS*** N/A
wp-toggle (bios) PASS PASS FAIL**
wp-toggle (ec) PASS PASS***
get-size (bios) PASS PASS FAIL**
get-size (ec) PASS PASS N/A
* - Tested on prototype hardware due to too small EC firmware ROM size of PVT machine.
** - Got weird bash error (probably due to "untested chip" spew). Will fix in follow-up.
*** - Can't test with script (due to EC not supporting "read status register" command), tested with Dediprog
Highlights from upstream include:
r1232: Reversible PCI config space write functions (rpci_* functions) which automatically add a shutdown callback to "undo" changes.
r1226, r1227: Improved Dediprog SF100 support
r1224: Use "real partial writes" for all chips.
r1223: Fix semantics of layout.
r1220 and r1218: Added SPI flash chip emulator and torture script, which ought to greatly improve testing.
r1217: Fix internal offset calculation for SPI byte program and AAI program, allowing us to start at non-zero offsets.
r1215: Always read chip before writing, and skip erase/writing of blocks that do not need to change.
r1211: Switch all chips to use partial write.
r1208: Refactor all write functions to use the form:
int write(struct flashchip *flash, uint8_t *src, int start, int len);
r1206: Kill programmer/chip specific erase functions, call erase from generic
code instead.
r1201: Add polling for completion of SPI write status register operation
r1193: On-the-fly reprogramming of ICH SPI opcode table
r1181, r1186: Improved DOS support
r1172: Add a delay to allow chips to exit ID mode before proceding with other
operations.
r1171: Improved SPI bitbanging support
r1170: Honor ICH SPI addres window for reads
r1147, r1148, r1149, r1150: Add FEATURE_WRSR_WREN to feature_bits for Eon,
Amic, Macronix, and Winbond SPI chips.
Patch Set 1 #Patch Set 2 : updated chip IDs and write_wpce775x signature #Patch Set 3 : update the testing status of w25q80, add some reviewers to CL #Patch Set 4 : add stefan to reviewers #
Total comments: 20
Patch Set 5 : bring us up to r1222, see CL description for more details #Patch Set 6 : Move the final "SUCCESS/FAILURE" message so it's always displayed. #Patch Set 7 : Update to r1232 #Patch Set 8 : Bring us up to r1235 #Patch Set 9 : Re-factoring of wpce775x to use generic partial write and write protect logic. #
Total comments: 5
Patch Set 10 : Moved SUCCESS/FAILED message to cli_mfg() to avoid duplicate messages from writeprotect stuff. #Patch Set 11 : init rc=0 in cli_mfg() and fix verbosity of a print statement in writeprotect.c #
MessagesTotal messages: 22
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